ARM: rockchip: rk3288: Switch to use the proper PWM IP

The rk3288 SoC has an option to switch all of the PWMs in the system
between the old IP block and the new IP block.  The new IP block is
working and tested and the suggested PWM to use, so setup the SoC to
use it and then we can pretend that the other IP block doesn't exist.

This code could go lots of other places, but we've put it here.  Why?
- Pushing it to the bootloader just makes the code harder to update in
  the field.  If we later find a bug in the new IP block and want to
  change our mind about what to use we want it to be easy to update.
- Putting this code in the driver for IP block is a lot of extra work,
  device tree bindings, etc.  Now that the new IP block is validated
  it's likely no future SoCs will need this code.  Why pollute the PWM
  driver with this?  This is an rk3288 thing so it should be in rk3288
  code.
- There's a single bit that switches over PWMs, which makes it extra
  hard to put this under the PWM device tree nodes.

Change-Id: Ib178129fc4f24f71d3a6f7315f757f91b5bdf534
Signed-off-by: Doug Anderson <dianders@chromium.org>

diff --git a/arch/arm/mach-rockchip/rockchip.c b/arch/arm/mach-rockchip/rockchip.c
index 251c7b9c5f9b6c15ffdab39475d6b7764e9c2fc0..7fbecd0f2d3da6dc8df6b8665a1b24598a251063 100644 (file)
--- a/arch/arm/mach-rockchip/rockchip.c
+++ b/arch/arm/mach-rockchip/rockchip.c
@@ -30,6 +30,7 @@
 #include "pm.h"
 
 #define RK3288_GRF_SOC_CON0 0x244
+#define RK3288_GRF_SOC_CON2 0x24C
 #define RK3288_TIMER6_7_PHYS 0xff810000
 
 static void __init rockchip_timer_init(void)
@@ -60,10 +61,14 @@ static void __init rockchip_timer_init(void)
                 * with the mmc controllers making them unreliable
                 */
                grf = syscon_regmap_lookup_by_compatible("rockchip,rk3288-grf");
-               if (!IS_ERR(grf))
+               if (!IS_ERR(grf)) {
                        regmap_write(grf, RK3288_GRF_SOC_CON0, 0x10000000);
-               else
+
+                       /* Set pwm_sel to RK design PWM; affects all PWMs */
+                       regmap_write(grf, RK3288_GRF_SOC_CON2, 0x00010001);
+               } else {
                        pr_err("rockchip: could not get grf syscon\n");
+                }
        }
 
        of_clk_init(NULL);