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clk: rockchip: rk3399: fix up the pr_err for debug
author
Elaine Zhang
<zhangqing@rock-chips.com>
Sun, 22 Jan 2017 06:57:29 +0000
(14:57 +0800)
committer
Elaine Zhang
<zhangqing@rock-chips.com>
Sun, 22 Jan 2017 06:57:29 +0000
(14:57 +0800)
Change-Id: I16eeacaf0307146ebf8db745621ef57e5ab16fec
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
drivers/clk/rockchip/clk-pll.c
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diff --git
a/drivers/clk/rockchip/clk-pll.c
b/drivers/clk/rockchip/clk-pll.c
index 978c1bb86c353a0d50a0b4c5fb390ac2d72fa9b2..6188a6cc13d2284a5a50d1787f5c979da4321938 100644
(file)
--- a/
drivers/clk/rockchip/clk-pll.c
+++ b/
drivers/clk/rockchip/clk-pll.c
@@
-106,9
+106,9
@@
static int rockchip_pll_clk_set_postdiv(unsigned long fout_hz,
return 0;
}
}
- pr_err("CANNOT FIND postdiv1/2 to make fout in range from 800M to 2000M,fout = %lu\n",
- fout_hz);
}
+ pr_err("CANNOT FIND postdiv1/2 to make fout in range from 800M to 2000M,fout = %lu\n",
+ fout_hz);
} else {
*postdiv1 = 1;
*postdiv2 = 1;