arm64: dts: rockchip: reorder some nodes for rk3399
authorHuang, Tao <huangtao@rock-chips.com>
Wed, 8 Mar 2017 10:32:18 +0000 (18:32 +0800)
committerHuang, Tao <huangtao@rock-chips.com>
Wed, 8 Mar 2017 10:32:18 +0000 (18:32 +0800)
keep order as upstream.

Change-Id: I52e0dfe97f0d12c550603675085a66346529794d
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>
arch/arm64/boot/dts/rockchip/rk3399.dtsi

index df9f1c7d7c5f6a6c1b835af8b35f1d0bb1e55b98..1b61b3372d142a784547efadb922054c0017a78d 100644 (file)
                serial4 = &uart4;
        };
 
-       psci {
-               compatible = "arm,psci-1.0";
-               method = "smc";
-       };
-
        cpus {
                #address-cells = <2>;
                #size-cells = <0>;
                };
        };
 
-       timer {
-               compatible = "arm,armv8-timer";
-               interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW 0>,
-                            <GIC_PPI 14 IRQ_TYPE_LEVEL_LOW 0>,
-                            <GIC_PPI 11 IRQ_TYPE_LEVEL_LOW 0>,
-                            <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW 0>;
-       };
-
        pmu_a53 {
                compatible = "arm,cortex-a53-pmu";
-               interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_LOW &part0>;
+               interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_LOW &ppi_cluster0>;
        };
 
        pmu_a72 {
                compatible = "arm,cortex-a72-pmu";
-               interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_LOW &part1>;
+               interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_LOW &ppi_cluster1>;
+       };
+
+       psci {
+               compatible = "arm,psci-1.0";
+               method = "smc";
+       };
+
+       timer {
+               compatible = "arm,armv8-timer";
+               interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW 0>,
+                            <GIC_PPI 14 IRQ_TYPE_LEVEL_LOW 0>,
+                            <GIC_PPI 11 IRQ_TYPE_LEVEL_LOW 0>,
+                            <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW 0>;
        };
 
        xin24m: xin24m {
                compatible = "fixed-clock";
-               #clock-cells = <0>;
                clock-frequency = <24000000>;
                clock-output-names = "xin24m";
+               #clock-cells = <0>;
        };
 
        amba {
                };
 
                ppi-partitions {
-                       part0: interrupt-partition-0 {
+                       ppi_cluster0: interrupt-partition-0 {
                                affinity = <&cpu_l0 &cpu_l1 &cpu_l2 &cpu_l3>;
                        };
 
-                       part1: interrupt-partition-1 {
+                       ppi_cluster1: interrupt-partition-1 {
                                affinity = <&cpu_b0 &cpu_b1>;
                        };
                };