ARM: at91/dt: sama5d2: add missing devices
authorLudovic Desroches <ludovic.desroches@atmel.com>
Fri, 16 Oct 2015 13:04:44 +0000 (15:04 +0200)
committerAlexandre Belloni <alexandre.belloni@free-electrons.com>
Mon, 19 Oct 2015 19:22:21 +0000 (21:22 +0200)
Big update of the sama5d2.dtsi file since many patches have reached te
mainline:
- add generated clocks
- enable crypto devices
- add flexcom devices
- add tdes device
- add sdmmc devices

Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
arch/arm/boot/dts/sama5d2.dtsi

index 780c8afc76001ae1f7acac249403cd45d603357a..c1f0cba402892086b7aa7df48e49e696c8cc6196 100644 (file)
                        cache-level = <2>;
                };
 
+               sdmmc0: sdio-host@a0000000 {
+                       compatible = "atmel,sama5d2-sdhci";
+                       reg = <0xa0000000 0x300>;
+                       interrupts = <31 IRQ_TYPE_LEVEL_HIGH 0>;
+                       clocks = <&sdmmc0_hclk>, <&sdmmc0_gclk>, <&main>;
+                       clock-names = "hclock", "multclk", "baseclk";
+                       status = "disabled";
+               };
+
+               sdmmc1: sdio-host@b0000000 {
+                       compatible = "atmel,sama5d2-sdhci";
+                       reg = <0xb0000000 0x300>;
+                       interrupts = <32 IRQ_TYPE_LEVEL_HIGH 0>;
+                       clocks = <&sdmmc1_hclk>, <&sdmmc1_gclk>, <&main>;
+                       clock-names = "hclock", "multclk", "baseclk";
+                       status = "disabled";
+               };
+
                apb {
                        compatible = "simple-bus";
                        #address-cells = <1>;
                                                atmel,clk-output-range = <0 83000000>;
                                        };
 
+                                       i2s0_clk: i2s0_clk {
+                                               #clock-cells = <0>;
+                                               reg = <54>;
+                                               atmel,clk-output-range = <0 83000000>;
+                                       };
+
+                                       i2s1_clk: i2s1_clk {
+                                               #clock-cells = <0>;
+                                               reg = <55>;
+                                               atmel,clk-output-range = <0 83000000>;
+                                       };
+
                                        classd_clk: classd_clk {
                                                #clock-cells = <0>;
                                                reg = <59>;
                                                reg = <53>;
                                        };
                                };
+
+                               gck {
+                                       compatible = "atmel,sama5d2-clk-generated";
+                                       #address-cells = <1>;
+                                       #size-cells = <0>;
+                                       interrupt-parent = <&pmc>;
+                                       clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>, <&mck>;
+
+                                       sdmmc0_gclk: sdmmc0_gclk {
+                                               #clock-cells = <0>;
+                                               reg = <31>;
+                                       };
+
+                                       sdmmc1_gclk: sdmmc1_gclk {
+                                               #clock-cells = <0>;
+                                               reg = <32>;
+                                       };
+
+                                       tcb0_gclk: tcb0_gclk {
+                                               #clock-cells = <0>;
+                                               reg = <35>;
+                                               atmel,clk-output-range = <0 83000000>;
+                                       };
+
+                                       tcb1_gclk: tcb1_gclk {
+                                               #clock-cells = <0>;
+                                               reg = <36>;
+                                               atmel,clk-output-range = <0 83000000>;
+                                       };
+
+                                       pwm_gclk: pwm_gclk {
+                                               #clock-cells = <0>;
+                                               reg = <38>;
+                                               atmel,clk-output-range = <0 83000000>;
+                                       };
+
+                                       i2s0_gclk: i2s0_gclk {
+                                               #clock-cells = <0>;
+                                               reg = <54>;
+                                       };
+
+                                       i2s1_gclk: i2s1_gclk {
+                                               #clock-cells = <0>;
+                                               reg = <55>;
+                                       };
+                               };
                        };
 
                        sha@f0028000 {
                                dma-names = "tx";
                                clocks = <&sha_clk>;
                                clock-names = "sha_clk";
-                               status = "disabled";
+                               status = "okay";
                        };
 
                        aes@f002c000 {
                                dma-names = "tx", "rx";
                                clocks = <&aes_clk>;
                                clock-names = "aes_clk";
-                               status = "disabled";
+                               status = "okay";
                        };
 
                        spi0: spi@f8000000 {
                                status = "disabled";
                        };
 
+                       flx0: flexcom@f8034000 {
+                               compatible = "atmel,sama5d2-flexcom";
+                               reg = <0xf8034000 0x200>;
+                               clocks = <&flx0_clk>;
+                               #address-cells = <1>;
+                               #size-cells = <1>;
+                               ranges = <0x0 0xf8034000 0x800>;
+                               status = "disabled";
+                       };
+
+                       flx1: flexcom@f8038000 {
+                               compatible = "atmel,sama5d2-flexcom";
+                               reg = <0xf8038000 0x200>;
+                               clocks = <&flx1_clk>;
+                               #address-cells = <1>;
+                               #size-cells = <1>;
+                               ranges = <0x0 0xf8038000 0x800>;
+                               status = "disabled";
+                       };
+
+                       rstc@f8048000 {
+                               compatible = "atmel,sama5d3-rstc";
+                               reg = <0xf8048000 0x10>;
+                               clocks = <&clk32k>;
+                       };
+
                        pit: timer@f8048030 {
                                compatible = "atmel,at91sam9260-pit";
                                reg = <0xf8048030 0x10>;
                                status = "disabled";
                        };
 
+                       flx2: flexcom@fc010000 {
+                               compatible = "atmel,sama5d2-flexcom";
+                               reg = <0xfc010000 0x200>;
+                               clocks = <&flx2_clk>;
+                               #address-cells = <1>;
+                               #size-cells = <1>;
+                               ranges = <0x0 0xfc010000 0x800>;
+                               status = "disabled";
+                       };
+
+                       flx3: flexcom@fc014000 {
+                               compatible = "atmel,sama5d2-flexcom";
+                               reg = <0xfc014000 0x200>;
+                               clocks = <&flx3_clk>;
+                               #address-cells = <1>;
+                               #size-cells = <1>;
+                               ranges = <0x0 0xfc014000 0x800>;
+                               status = "disabled";
+                       };
+
+                       flx4: flexcom@fc018000 {
+                               compatible = "atmel,sama5d2-flexcom";
+                               reg = <0xfc018000 0x200>;
+                               clocks = <&flx4_clk>;
+                               #address-cells = <1>;
+                               #size-cells = <1>;
+                               ranges = <0x0 0xfc018000 0x800>;
+                               status = "disabled";
+                       };
+
                        aic: interrupt-controller@fc020000 {
                                #interrupt-cells = <3>;
                                compatible = "atmel,sama5d2-aic";
                                clocks = <&twi1_clk>;
                                status = "disabled";
                        };
+
+                       tdes@fc044000 {
+                               compatible = "atmel,at91sam9g46-tdes";
+                               reg = <0xfc044000 0x100>;
+                               interrupts = <11 IRQ_TYPE_LEVEL_HIGH 0>;
+                               dmas = <&dma0
+                                       (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
+                                        AT91_XDMAC_DT_PERID(28))>,
+                                      <&dma0
+                                       (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
+                                        AT91_XDMAC_DT_PERID(29))>;
+                               dma-names = "tx", "rx";
+                               clocks = <&tdes_clk>;
+                               clock-names = "tdes_clk";
+                               status = "okay";
+                       };
                };
        };
 };