arm: dts: rk3288: add iep node and enable it

Change-Id: Ie7fe0bbc91a5fedb0617d9b6c6056bdb4aed610d
Signed-off-by: buluess.li <buluess.li@rock-chips.com>

diff --git a/arch/arm/boot/dts/rk3288-android.dtsi b/arch/arm/boot/dts/rk3288-android.dtsi
index 9fddfe72bc2b0e9b47c77078bf7bc90eb5d758eb..d3a3ebb467f26c15c9c713f052e5adabd9d77889 100644 (file)
--- a/arch/arm/boot/dts/rk3288-android.dtsi
+++ b/arch/arm/boot/dts/rk3288-android.dtsi
@@ -288,6 +288,14 @@
        compatible = "rockchip,rk3288-secure-efuse";
 };
 
+&iep {
+       status = "okay";
+};
+
+&iep_mmu {
+       status = "okay";
+};
+
 &rga {
        compatible = "rockchip,rga2";
        clocks = <&cru ACLK_RGA>, <&cru HCLK_RGA>, <&cru SCLK_RGA>;

diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index 88979ebdd38056eca43db35f25f73a33e9cdb4fe..49aa2f06033ef6a009f2d5ad0cc5e3a67d1e9cf3 100644 (file)
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -1059,6 +1059,29 @@
                status = "disabled";
        };
 
+       iep: iep@ff90000 {
+               compatible = "rockchip,iep";
+               iommu_enabled = <1>;
+               iommus = <&iep_mmu>;
+               reg = <0x0 0xff900000 0x0 0x800>;
+               interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH 0>;
+               clocks = <&cru ACLK_IEP>, <&cru HCLK_IEP>;
+               clock-names = "aclk_iep", "hclk_iep";
+               power-domains = <&power RK3288_PD_VIO>;
+               allocator = <1>;
+               version = <1>;
+               status = "disabled";
+       };
+
+       iep_mmu: iommu@ff900800 {
+               compatible = "rockchip,iommu";
+               reg = <0x0 0xff900800 0x0 0x40>;
+               interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH 0>;
+               interrupt-names = "iep_mmu";
+               #iommu-cells = <0>;
+               status = "disabled";
+       };
+
        cif_isp0: cif_isp@ff910000 {
                compatible = "rockchip,rk3288-cif-isp";
                rockchip,grf = <&grf>;