ARM64: dts: rk336x: fix enable incorrect HCLK_I2Sx when startup

This patch like below:
----
commit 3860aa1ccfe01adb6c3fd09e880d812ceb408e5c
Author: Heiko Stuebner <heiko@sntech.de>
Date:   Sat Jan 9 03:18:51 2016 +0100

    ARM: dts: rockchip: swap i2s clock ordering on rk3036

    For sound setups using the simple-card mechanism, the main clock
    (sysclk) is expected to be the first element. For the i2s-driver
    itself it doesn't matter, as it uses named clocks, so we can just
    swap them.
----
If we set HCLK_I2Sx at first, rockchip_i2s_set_sysclk will set the
HCLK_I2S freq (from example is 100MHz) to set the i2s_div, it is
incorrect.

Change-Id: Iab69d541c47d1293a784ebffc23f6c1ceaf9c0b1
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/arch/arm64/boot/dts/rockchip/rk3366.dtsi b/arch/arm64/boot/dts/rockchip/rk3366.dtsi
index dba564aaf5a9dc90f9b1e1387f2718b77aecd412..512de6811ecf6a29387dd2594666b2e7fa11bc30 100644 (file)
--- a/arch/arm64/boot/dts/rockchip/rk3366.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3366.dtsi
@@ -725,8 +725,8 @@
                interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
                dmas = <&dmac_bus 3>;
                dma-names = "tx";
-               clock-names = "hclk", "mclk";
-               clocks = <&cru HCLK_SPDIF>, <&cru SCLK_SPDIF_8CH>;
+               clock-names = "mclk", "hclk";
+               clocks = <&cru SCLK_SPDIF_8CH>, <&cru HCLK_SPDIF>;
                pinctrl-names = "default";
                pinctrl-0 = <&spdif_bus>;
                status = "disabled";
@@ -738,8 +738,8 @@
                interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
                dmas = <&dmac_bus 6>, <&dmac_bus 7>;
                dma-names = "tx", "rx";
-               clock-names = "i2s_hclk", "i2s_clk";
-               clocks = <&cru HCLK_I2S_2CH>, <&cru SCLK_I2S_2CH>;
+               clock-names = "i2s_clk", "i2s_hclk";
+               clocks = <&cru SCLK_I2S_2CH>, <&cru HCLK_I2S_2CH>;
                status = "disabled";
        };
 
@@ -749,8 +749,8 @@
                interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
                dmas = <&dmac_bus 0>, <&dmac_bus 1>;
                dma-names = "tx", "rx";
-               clock-names = "i2s_hclk", "i2s_clk";
-               clocks = <&cru HCLK_I2S_8CH>, <&cru SCLK_I2S_8CH>;
+               clock-names = "i2s_clk", "i2s_hclk";
+               clocks = <&cru SCLK_I2S_8CH>, <&cru HCLK_I2S_8CH>;
                pinctrl-names = "default";
                pinctrl-0 = <&i2s_8ch_bus>;
                status = "disabled";

diff --git a/arch/arm64/boot/dts/rockchip/rk3368.dtsi b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
index 1546d5221f82b34aeb68787cbd92237f0b719833..cace8773d937aa9b0668972472b4403f12fb57de 100644 (file)
--- a/arch/arm64/boot/dts/rockchip/rk3368.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
@@ -822,8 +822,8 @@
                interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
                dmas = <&dmac_bus 6>, <&dmac_bus 7>;
                dma-names = "tx", "rx";
-               clock-names = "i2s_hclk", "i2s_clk";
-               clocks = <&cru HCLK_I2S_2CH>, <&cru SCLK_I2S_2CH>;
+               clock-names = "i2s_clk", "i2s_hclk";
+               clocks = <&cru SCLK_I2S_2CH>, <&cru HCLK_I2S_2CH>;
                status = "disabled";
        };
 
@@ -833,8 +833,8 @@
                interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
                dmas = <&dmac_bus 0>, <&dmac_bus 1>;
                dma-names = "tx", "rx";
-               clock-names = "i2s_hclk", "i2s_clk";
-               clocks = <&cru HCLK_I2S_8CH>, <&cru SCLK_I2S_8CH>;
+               clock-names = "i2s_clk", "i2s_hclk";
+               clocks = <&cru SCLK_I2S_8CH>, <&cru HCLK_I2S_8CH>;
                pinctrl-names = "default";
                pinctrl-0 = <&i2s_8ch_bus>;
                status = "disabled";