312x: add saradc dts

diff --git a/arch/arm/boot/dts/rk312x.dtsi b/arch/arm/boot/dts/rk312x.dtsi
index 33ba15e2d7ba5fb190ccdd88cc6edb28ff1a3d54..5cc92dae68e5e2a548ebb0876aa07e8ed5d017b7 100755 (executable)
--- a/arch/arm/boot/dts/rk312x.dtsi
+++ b/arch/arm/boot/dts/rk312x.dtsi
@@ -17,6 +17,7 @@
                i2c0 = &i2c0;
                i2c1 = &i2c1;
                i2c2 = &i2c2;
+               i2c3 = &i2c3;
        //      spi0 = &spi0;
        };
 
@@ -133,7 +134,7 @@
                dmas = <&pdma 4>, <&pdma 5>;
                #dma-cells = <2>;
                pinctrl-names = "default";
-       //      pinctrl-0 = <&uart1_xfer>;
+       //      pinctrl-0 = <&uart1_xfer &uart1_cts &uart1_rts>;
                status = "disabled";
        };
 
@@ -221,6 +222,19 @@
                status = "disabled";
        };
 
+       adc: adc@2006c000 {
+               compatible = "rockchip,saradc";
+               reg = <0x2006c000 0x100>;
+               interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
+               #io-channel-cells = <1>;
+               io-channel-ranges;
+               rockchip,adc-vref = <1800>;
+               clock-frequency = <1000000>;
+               //clocks = <&clk_saradc>, <&clk_gates7 1>;
+               //clock-names = "saradc", "pclk_saradc";
+               status = "disabled";
+       };
+
        pwm0: pwm@20050000 {
                compatible = "rockchip,rk-pwm";
                reg = <0x20050000 0x10>;