git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240415
91177308-0d34-0410-b5e6-
96231b3b80d8
for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
const MachineOperand &Op = MI->getOperand(i);
- // Merge in bits from the operand if easy.
+ // Merge in bits from the operand if easy. We can't use MachineOperand's
+ // hash_code here because it's not deterministic and we sort by hash value
+ // later.
unsigned OperandHash = 0;
switch (Op.getType()) {
case MachineOperand::MO_Register: