rockchip: clk: rk3399: default enable dual pll for vop

Change-Id: I88a2a549eaafa91e4159f262a5f5838c834a89e9
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>

diff --git a/include/dt-bindings/clock/rk3399-cru.h b/include/dt-bindings/clock/rk3399-cru.h
index 0fc9e7a00b279643493a3109bc71eb806876d769..d32ce0128519b07ea448e193a5606d4c81379400 100644 (file)
--- a/include/dt-bindings/clock/rk3399-cru.h
+++ b/include/dt-bindings/clock/rk3399-cru.h
@@ -16,7 +16,7 @@
 #ifndef _DT_BINDINGS_CLK_ROCKCHIP_RK3399_H
 #define _DT_BINDINGS_CLK_ROCKCHIP_RK3399_H
 
-/* #define RK3399_TWO_PLL_FOR_VOP */
+#define RK3399_TWO_PLL_FOR_VOP
 
 /* core clocks */
 #define PLL_APLLL                      1