sdmmc: In order to improve the timing,set HOLD_REG to 1,mainly used in RK2928 and...

diff --git a/drivers/mmc/host/rk29_sdmmc.c b/drivers/mmc/host/rk29_sdmmc.c
index 82751006aba569da0dd3f592b448815420bcd579..7e5c999f65ae94af02954b2899fea225a3b3818b 100755 (executable)
--- a/drivers/mmc/host/rk29_sdmmc.c
+++ b/drivers/mmc/host/rk29_sdmmc.c
@@ -98,7 +98,7 @@ int debug_level = 5;
 #define RK29_SDMMC_WAIT_DTO_INTERNVAL   4500  //The time interval from the CMD_DONE_INT to DTO_INT
 #define RK29_SDMMC_REMOVAL_DELAY        2000  //The time interval from the CD_INT to detect_timer react.
 
-#define RK29_SDMMC_VERSION "Ver.4.02 The last modify date is 2012-08-12"
+#define RK29_SDMMC_VERSION "Ver.4.03 The last modify date is 2012-08-21"
 
 #if !defined(CONFIG_USE_SDMMC0_FOR_WIFI_DEVELOP_BOARD) 
 #define RK29_CTRL_SDMMC_ID   0  //mainly used by SDMMC
@@ -832,8 +832,11 @@ static int rk29_sdmmc_start_command(struct rk29_sdmmc *host, struct mmc_command
     }
                        
        rk29_sdmmc_write(host->regs, SDMMC_CMDARG, cmd->arg); // write to SDMMC_CMDARG register
+#if defined(CONFIG_ARCH_RK29)  
        rk29_sdmmc_write(host->regs, SDMMC_CMD, cmd_flags | SDMMC_CMD_START); // write to SDMMC_CMD register
-
+#else
+    rk29_sdmmc_write(host->regs, SDMMC_CMD, cmd_flags | SDMMC_CMD_USE_HOLD_REG |SDMMC_CMD_START); // write to SDMMC_CMD register
+#endif
 
     xbwprintk(1,"\n%s..%d..************.start cmd=%d, arg=0x%x ********  [%s]\n", \
                        __FUNCTION__, __LINE__, cmd->opcode, cmd->arg, host->dma_name);
@@ -1449,8 +1452,12 @@ static void rk29_sdmmc_submit_data(struct rk29_sdmmc *host, struct mmc_data *dat
 static int sdmmc_send_cmd_start(struct rk29_sdmmc *host, unsigned int cmd)
 {
        int tmo = RK29_SDMMC_SEND_START_TIMEOUT*10;//wait 60ms cycle.
-       
-       rk29_sdmmc_write(host->regs, SDMMC_CMD, SDMMC_CMD_START | cmd);         
+
+#if defined(CONFIG_ARCH_RK29)          
+       rk29_sdmmc_write(host->regs, SDMMC_CMD, SDMMC_CMD_START | cmd); 
+#else  
+    rk29_sdmmc_write(host->regs, SDMMC_CMD, SDMMC_CMD_USE_HOLD_REG |SDMMC_CMD_START | cmd);
+#endif    
        while (--tmo && (rk29_sdmmc_read(host->regs, SDMMC_CMD) & SDMMC_CMD_START))
        {
            udelay(2);

diff --git a/drivers/mmc/host/rk29_sdmmc.h b/drivers/mmc/host/rk29_sdmmc.h
index 17b6d2b209b81c89d2725735c8b8f2be86ebd663..33b5999b72699c9b163514473daf32baf2c7e29a 100755 (executable)
--- a/drivers/mmc/host/rk29_sdmmc.h
+++ b/drivers/mmc/host/rk29_sdmmc.h
@@ -48,7 +48,7 @@
 
 #if defined(CONFIG_ARCH_RK29)
 #define SDMMC_DATA            (0x100)
-#elif defined(CONFIG_ARCH_RK30) || defined(CONFIG_ARCH_RK31) || defined(CONFIG_ARCH_RK2928)
+#else
 #define SDMMC_VERID           (0x06c)   //Version ID register
 #define SDMMC_UHS_REG         (0x074)   //UHS-I register
 #define SDMMC_RST_n           (0x078)   //Hardware reset register
@@ -102,7 +102,7 @@
 /* Interrupt status & mask register defines(base+0x24) */
 #if defined(CONFIG_ARCH_RK29)
 #define SDMMC_INT_SDIO          RK2818_BIT(16)      //SDIO interrupt
-#elif defined(CONFIG_ARCH_RK30) || defined(CONFIG_ARCH_RK31)  || defined(CONFIG_ARCH_RK2928)
+#else
 #define SDMMC_INT_SDIO          RK2818_BIT(24)      //SDIO interrupt
 #define SDMMC_INT_UNBUSY        RK2818_BIT(16)      //data no busy interrupt
 #endif
@@ -126,6 +126,14 @@
 
 /* Command register defines(base+0x2C) */
 #define SDMMC_CMD_START         RK2818_BIT(31)      //start command
+#if !defined(CONFIG_ARCH_RK29)
+#define SDMMC_CMD_USE_HOLD_REG      RK2818_BIT(29)      //Use hold register.
+#define SDMMC_CMD_VOLT_SWITCH       RK2818_BIT(28)      //Voltage switch bit
+#define SDMMC_CMD_BOOT_MODE         RK2818_BIT(27)      //set boot mode.
+#define SDMMC_CMD_DISABLE_BOOT      RK2818_BIT(26)      //disable boot.
+#define SDMMC_CMD_EXPECT_BOOT_ACK   RK2818_BIT(25)      //Expect Boot Acknowledge.
+#define SDMMC_CMD_ENABLE_BOOT       RK2818_BIT(24)      //be set only for mandatory boot mode.
+#endif
 #define SDMMC_CMD_UPD_CLK       RK2818_BIT(21)      //update clock register only
 #define SDMMC_CMD_INIT          RK2818_BIT(15)      //send initialization sequence
 #define SDMMC_CMD_STOP          RK2818_BIT(14)      //stop abort command
@@ -181,7 +189,7 @@
 #define RX_WMARK          (0xF)        //RX watermark level set to 15
 #define TX_WMARK          (0x10)       //TX watermark level set to 16
 
-#elif defined(CONFIG_ARCH_RK30) || defined(CONFIG_ARCH_RK31)  || defined(CONFIG_ARCH_RK2928)
+#else
 #define FIFO_DEPTH        (0x100)       //FIFO depth = 256 word
 #define RX_WMARK_SHIFT    (16)
 #define TX_WMARK_SHIFT    (0)