Fix typo. Not quite sure how that slipped in there.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137245 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
index 8273ffc44ab01ac9f41f5f448c30f70ca165e5a0..fcc8a6a7fd655df336eb5585fdd73bf887176bcb 100644 (file)
--- a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
+++ b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
@@ -2740,9 +2740,9 @@ validateInstruction(MCInst &Inst,
                    "destination operands must be sequential");
     return false;
   }
-  case ARM::STRgD:
-  case ARM::STRgD_PRE:
-  case ARM::STRgD_POST:
+  case ARM::STRD:
+  case ARM::STRD_PRE:
+  case ARM::STRD_POST:
   case ARM::STREXD: {
     // Rt2 must be Rt + 1.
     unsigned Rt = getARMRegisterNumbering(Inst.getOperand(1).getReg());