drm/radeon/kms: enable misc pm power state features on r5xx, rs6xx
authorAlex Deucher <alexdeucher@gmail.com>
Thu, 29 Apr 2010 20:33:38 +0000 (16:33 -0400)
committerDave Airlie <airlied@redhat.com>
Tue, 18 May 2010 08:21:42 +0000 (18:21 +1000)
voltage drop, dynamic voltage, dynamic sclk, pcie lane adjust, etc,

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
drivers/gpu/drm/radeon/rs600.c
drivers/gpu/drm/radeon/rs600d.h

index c3890b76a1c0496a91e1976438df5f1508d505ba..8e0c46060b3aecd7d052d0ab4fe6a9d5850c203d 100644 (file)
@@ -48,12 +48,11 @@ int rs600_mc_wait_for_idle(struct radeon_device *rdev);
 
 void rs600_pm_misc(struct radeon_device *rdev)
 {
-#if 0
        int requested_index = rdev->pm.requested_power_state_index;
        struct radeon_power_state *ps = &rdev->pm.power_state[requested_index];
        struct radeon_voltage *voltage = &ps->clock_info[0].voltage;
        u32 tmp, dyn_pwrmgt_sclk_length, dyn_sclk_vol_cntl;
-       u32 hdp_dyn_cntl, mc_host_dyn_cntl;
+       u32 hdp_dyn_cntl, /*mc_host_dyn_cntl,*/ dyn_backbias_cntl;
 
        if ((voltage->type == VOLTAGE_GPIO) && (voltage->gpio.valid)) {
                if (ps->misc & ATOM_PM_MISCINFO_VOLTAGE_DROP_SUPPORT) {
@@ -112,13 +111,21 @@ void rs600_pm_misc(struct radeon_device *rdev)
        else
                hdp_dyn_cntl |= HDP_FORCEON;
        WREG32_PLL(HDP_DYN_CNTL, hdp_dyn_cntl);
-
+#if 0
+       /* mc_host_dyn seems to cause hangs from time to time */
        mc_host_dyn_cntl = RREG32_PLL(MC_HOST_DYN_CNTL);
        if (ps->misc & ATOM_PM_MISCINFO_DYNAMIC_MC_HOST_BLOCK_EN)
                mc_host_dyn_cntl &= ~MC_HOST_FORCEON;
        else
                mc_host_dyn_cntl |= MC_HOST_FORCEON;
        WREG32_PLL(MC_HOST_DYN_CNTL, mc_host_dyn_cntl);
+#endif
+       dyn_backbias_cntl = RREG32_PLL(DYN_BACKBIAS_CNTL);
+       if (ps->misc & ATOM_PM_MISCINFO2_DYNAMIC_BACK_BIAS_EN)
+               dyn_backbias_cntl |= IO_CG_BACKBIAS_EN;
+       else
+               dyn_backbias_cntl &= ~IO_CG_BACKBIAS_EN;
+       WREG32_PLL(DYN_BACKBIAS_CNTL, dyn_backbias_cntl);
 
        /* set pcie lanes */
        if ((rdev->flags & RADEON_IS_PCIE) &&
@@ -130,7 +137,6 @@ void rs600_pm_misc(struct radeon_device *rdev)
                                      ps->pcie_lanes);
                DRM_INFO("Setting: p: %d\n", ps->pcie_lanes);
        }
-#endif
 }
 
 void rs600_pm_prepare(struct radeon_device *rdev)
index 8f624342927a7d19f065da3fde3c01581bf36801..a27c13ac47c312ade8ca5ceee9ed45a3d59fcff4 100644 (file)
 #define   HDP_FORCEON                                  (1 << 0)
 #define MC_HOST_DYN_CNTL                               0x1e
 #define   MC_HOST_FORCEON                              (1 << 0)
+#define DYN_BACKBIAS_CNTL                              0x29
+#define   IO_CG_BACKBIAS_EN                            (1 << 0)
 
 /* mmreg */
 #define DOUT_POWER_MANAGEMENT_CNTL                     0x7ee0