[ARM] tegra: stingray: Add drive strength table

Signed-off-by: Colin Cross <ccross@android.com>
Change-Id: Ia37ea49f177fd3398b19a81b51054fc295dc0aec

diff --git a/arch/arm/mach-tegra/board-stingray-pinmux.c b/arch/arm/mach-tegra/board-stingray-pinmux.c
index 8f329887e3e161a5e80cd72e48e5c09d17b73100..e91b4346a5e7aeffe9916113fc7d3c95189b5b8e 100644 (file)
--- a/arch/arm/mach-tegra/board-stingray-pinmux.c
+++ b/arch/arm/mach-tegra/board-stingray-pinmux.c
@@ -142,9 +142,42 @@ static __initdata struct tegra_pingroup_config stingray_pinmux[] = {
        {TEGRA_PINGROUP_XM2D,  TEGRA_MUX_NONE,          TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},
 };
 
+static __initdata struct tegra_drive_pingroup_config stingray_drive_pinmux[] = {
+       {TEGRA_DRIVE_PINGROUP_AO1,     TEGRA_HSM_DISABLE, TEGRA_SCHMITT_ENABLE,  TEGRA_DRIVE_DIV_1, TEGRA_PULL_31, TEGRA_PULL_31, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_SLOWEST},
+       {TEGRA_DRIVE_PINGROUP_AO2,     TEGRA_HSM_DISABLE, TEGRA_SCHMITT_ENABLE,  TEGRA_DRIVE_DIV_1, TEGRA_PULL_31, TEGRA_PULL_31, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_SLOWEST},
+       {TEGRA_DRIVE_PINGROUP_AT1,     TEGRA_HSM_DISABLE, TEGRA_SCHMITT_ENABLE,  TEGRA_DRIVE_DIV_1, TEGRA_PULL_31, TEGRA_PULL_31, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_SLOWEST},
+       {TEGRA_DRIVE_PINGROUP_AT2,     TEGRA_HSM_DISABLE, TEGRA_SCHMITT_ENABLE,  TEGRA_DRIVE_DIV_1, TEGRA_PULL_31, TEGRA_PULL_31, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_SLOWEST},
+       {TEGRA_DRIVE_PINGROUP_CDEV1,   TEGRA_HSM_DISABLE, TEGRA_SCHMITT_DISABLE, TEGRA_DRIVE_DIV_1, TEGRA_PULL_18, TEGRA_PULL_22, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_SLOWEST},
+       {TEGRA_DRIVE_PINGROUP_CDEV2,   TEGRA_HSM_DISABLE, TEGRA_SCHMITT_DISABLE, TEGRA_DRIVE_DIV_1, TEGRA_PULL_18, TEGRA_PULL_22, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_SLOWEST},
+       {TEGRA_DRIVE_PINGROUP_CSUS,    TEGRA_HSM_DISABLE, TEGRA_SCHMITT_DISABLE, TEGRA_DRIVE_DIV_1, TEGRA_PULL_18, TEGRA_PULL_22, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_SLOWEST},
+       {TEGRA_DRIVE_PINGROUP_DAP1,    TEGRA_HSM_DISABLE, TEGRA_SCHMITT_ENABLE,  TEGRA_DRIVE_DIV_1, TEGRA_PULL_0,  TEGRA_PULL_0,  TEGRA_SLEW_FASTEST, TEGRA_SLEW_FASTEST},
+       {TEGRA_DRIVE_PINGROUP_DAP2,    TEGRA_HSM_DISABLE, TEGRA_SCHMITT_ENABLE,  TEGRA_DRIVE_DIV_8, TEGRA_PULL_0,  TEGRA_PULL_0,  TEGRA_SLEW_FASTEST, TEGRA_SLEW_FASTEST},
+       {TEGRA_DRIVE_PINGROUP_DAP3,    TEGRA_HSM_DISABLE, TEGRA_SCHMITT_ENABLE,  TEGRA_DRIVE_DIV_8, TEGRA_PULL_0,  TEGRA_PULL_0,  TEGRA_SLEW_FASTEST, TEGRA_SLEW_FASTEST},
+       {TEGRA_DRIVE_PINGROUP_DAP4,    TEGRA_HSM_DISABLE, TEGRA_SCHMITT_DISABLE, TEGRA_DRIVE_DIV_1, TEGRA_PULL_18, TEGRA_PULL_22, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_SLOWEST},
+       {TEGRA_DRIVE_PINGROUP_DBG,     TEGRA_HSM_DISABLE, TEGRA_SCHMITT_ENABLE,  TEGRA_DRIVE_DIV_1, TEGRA_PULL_31, TEGRA_PULL_31, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_SLOWEST},
+       {TEGRA_DRIVE_PINGROUP_LCD1,    TEGRA_HSM_DISABLE, TEGRA_SCHMITT_DISABLE, TEGRA_DRIVE_DIV_1, TEGRA_PULL_18, TEGRA_PULL_22, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_SLOWEST},
+       {TEGRA_DRIVE_PINGROUP_LCD2,    TEGRA_HSM_DISABLE, TEGRA_SCHMITT_DISABLE, TEGRA_DRIVE_DIV_1, TEGRA_PULL_18, TEGRA_PULL_22, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_SLOWEST},
+       {TEGRA_DRIVE_PINGROUP_SDMMC2,  TEGRA_HSM_DISABLE, TEGRA_SCHMITT_ENABLE,  TEGRA_DRIVE_DIV_1, TEGRA_PULL_31, TEGRA_PULL_31, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_SLOWEST},
+       {TEGRA_DRIVE_PINGROUP_SDMMC3,  TEGRA_HSM_DISABLE, TEGRA_SCHMITT_ENABLE,  TEGRA_DRIVE_DIV_1, TEGRA_PULL_31, TEGRA_PULL_31, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_SLOWEST},
+       {TEGRA_DRIVE_PINGROUP_SPI,     TEGRA_HSM_DISABLE, TEGRA_SCHMITT_DISABLE, TEGRA_DRIVE_DIV_1, TEGRA_PULL_18, TEGRA_PULL_22, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_SLOWEST},
+       {TEGRA_DRIVE_PINGROUP_UAA,     TEGRA_HSM_DISABLE, TEGRA_SCHMITT_DISABLE, TEGRA_DRIVE_DIV_1, TEGRA_PULL_18, TEGRA_PULL_22, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_SLOWEST},
+       {TEGRA_DRIVE_PINGROUP_UAB,     TEGRA_HSM_DISABLE, TEGRA_SCHMITT_DISABLE, TEGRA_DRIVE_DIV_1, TEGRA_PULL_18, TEGRA_PULL_22, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_SLOWEST},
+       {TEGRA_DRIVE_PINGROUP_UART2,   TEGRA_HSM_DISABLE, TEGRA_SCHMITT_DISABLE, TEGRA_DRIVE_DIV_1, TEGRA_PULL_18, TEGRA_PULL_22, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_SLOWEST},
+       {TEGRA_DRIVE_PINGROUP_UART3,   TEGRA_HSM_DISABLE, TEGRA_SCHMITT_DISABLE, TEGRA_DRIVE_DIV_1, TEGRA_PULL_18, TEGRA_PULL_22, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_SLOWEST},
+       {TEGRA_DRIVE_PINGROUP_VI1,     TEGRA_HSM_DISABLE, TEGRA_SCHMITT_ENABLE,  TEGRA_DRIVE_DIV_1, TEGRA_PULL_31, TEGRA_PULL_31, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_SLOWEST},
+       {TEGRA_DRIVE_PINGROUP_VI2,     TEGRA_HSM_DISABLE, TEGRA_SCHMITT_ENABLE,  TEGRA_DRIVE_DIV_1, TEGRA_PULL_31, TEGRA_PULL_31, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_SLOWEST},
+       {TEGRA_DRIVE_PINGROUP_XM2A,    TEGRA_HSM_DISABLE, TEGRA_SCHMITT_DISABLE, TEGRA_DRIVE_DIV_8, TEGRA_PULL_28, TEGRA_PULL_31, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_FAST},
+       {TEGRA_DRIVE_PINGROUP_XM2C,    TEGRA_HSM_DISABLE, TEGRA_SCHMITT_ENABLE,  TEGRA_DRIVE_DIV_1, TEGRA_PULL_31, TEGRA_PULL_31, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_FAST},
+       {TEGRA_DRIVE_PINGROUP_XM2D,    TEGRA_HSM_DISABLE, TEGRA_SCHMITT_ENABLE,  TEGRA_DRIVE_DIV_1, TEGRA_PULL_31, TEGRA_PULL_31, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_FAST},
+       {TEGRA_DRIVE_PINGROUP_XM2CLK,  TEGRA_HSM_DISABLE, TEGRA_SCHMITT_DISABLE, TEGRA_DRIVE_DIV_8, TEGRA_PULL_28, TEGRA_PULL_31, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_FAST},
+       {TEGRA_DRIVE_PINGROUP_MEMCOMP, TEGRA_HSM_DISABLE, TEGRA_SCHMITT_ENABLE,  TEGRA_DRIVE_DIV_8, TEGRA_PULL_31, TEGRA_PULL_31, TEGRA_SLEW_FASTEST, TEGRA_SLEW_FASTEST},
+};
+
 void __init stingray_pinmux_init(void)
 {
        tegra_pinmux_config_table(stingray_pinmux, ARRAY_SIZE(stingray_pinmux));
+       tegra_drive_pinmux_config_table(stingray_drive_pinmux,
+               ARRAY_SIZE(stingray_drive_pinmux));
 
        tegra_gpio_disable(TEGRA_GPIO_PE0);
        tegra_gpio_disable(TEGRA_GPIO_PE1);