[X86] Don't use BZHI for short masks (>=32 bits). Thanks to Ben Kramer for the

review.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206869 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp
index 47df663bcdc6adc7fb8a94a762c1dd78142c4be2..8ed95d5412e952e302417cde3b33820ab185384f 100644 (file)
--- a/lib/Target/X86/X86ISelLowering.cpp
+++ b/lib/Target/X86/X86ISelLowering.cpp
@@ -18507,13 +18507,15 @@ static SDValue PerformAndCombine(SDNode *N, SelectionDAG &DAG,
     // Check for BZHI with contiguous mask: (and X, 0x0..0f..f)
     // This should be checked after BEXTR - when X is a shift, a BEXTR is
     // preferrable.
-    if (Subtarget->hasBMI2()) {
+    if (VT == MVT::i64 && Subtarget->hasBMI2()) {
       if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N1)) {
         uint64_t Mask = C->getZExtValue();
         if (isMask_64(Mask)) {
           unsigned LZ = CountTrailingOnes_64(Mask);
-          return DAG.getNode(X86ISD::BZHI, DL, VT, N0,
-                             DAG.getConstant(LZ, MVT::i8));
+          // Only use BZHI for immediates that are too large for an AND:
+          if (LZ > 32)
+            return DAG.getNode(X86ISD::BZHI, DL, VT, N0,
+                               DAG.getConstant(LZ, MVT::i8));
         }
       }
     }

diff --git a/test/CodeGen/X86/bmi.ll b/test/CodeGen/X86/bmi.ll
index c04fe9b5cfae09ed902ea0c31a2f11bb82cccf05..a70720926de08a4aaf9ae68549bcd527d81153d7 100644 (file)
--- a/test/CodeGen/X86/bmi.ll
+++ b/test/CodeGen/X86/bmi.ll
@@ -216,22 +216,21 @@ entry:
 ; CHECK: bzhiq
 }
 
-define i32 @bzhi32_constant_mask(i32 %x) #0 {
-entry:
-  %and = and i32 %x, 1073741823
-  ret i32 %and
-; CHECK-LABEL: bzhi32_constant_mask:
-; CHECK: movb    $30, %al
-; CHECK: bzhil   %eax, %e[[ARG1:di|cx]], %eax
-}
-
 define i64 @bzhi64_constant_mask(i64 %x) #0 {
 entry:
   %and = and i64 %x, 4611686018427387903
   ret i64 %and
 ; CHECK-LABEL: bzhi64_constant_mask:
 ; CHECK: movb    $62, %al
-; CHECK: bzhiq   %rax, %r[[ARG1]], %rax
+; CHECK: bzhiq   %rax, %r[[ARG1:di|cx]], %rax
+}
+
+define i64 @bzhi64_small_constant_mask(i64 %x) #0 {
+entry:
+  %and = and i64 %x, 2147483647
+  ret i64 %and
+; CHECK-LABEL: bzhi64_small_constant_mask:
+; CHECK: andq  $2147483647, %r[[ARG1]]
 }
 
 define i32 @blsi32(i32 %x) nounwind readnone {