arm64: dts: rockchip: move vpu/rkvdec to rk3399.dtsi

Right now only one driver support vpu and rkvdec,
so move the nodes from rk3399-android[-next].dtsi to rk3399.dtsi.

Change-Id: Id908843774ed8eede3aeddb24059ae92a35e5b98
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>

diff --git a/arch/arm64/boot/dts/rockchip/rk3399-android-next.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-android-next.dtsi
index 9ddf724d145a13ff097b86b7fac2c77346030b18..dd773cb7b4cd041985e9eb24330b08a0e752eb8a 100644 (file)
--- a/arch/arm64/boot/dts/rockchip/rk3399-android-next.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399-android-next.dtsi
@@ -136,65 +136,6 @@
                };
        };
 
-       vpu: vpu_service@ff650000 {
-               compatible = "rockchip,vpu_service";
-               rockchip,grf = <&grf>;
-               iommus = <&vpu_mmu>;
-               iommu_enabled = <1>;
-               reg = <0x0 0xff650000 0x0 0x800>;
-               interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH 0>,
-                       <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH 0>;
-               interrupt-names = "irq_dec", "irq_enc";
-               clocks = <&cru ACLK_VCODEC>, <&cru HCLK_VCODEC>;
-               clock-names = "aclk_vcodec", "hclk_vcodec";
-               resets = <&cru SRST_H_VCODEC>, <&cru SRST_A_VCODEC>;
-               reset-names = "video_h", "video_a";
-               power-domains = <&power RK3399_PD_VCODEC>;
-               name = "vpu_service";
-               dev_mode = <0>;
-               /* 0 means ion, 1 means drm */
-               allocator = <1>;
-               status = "disabled";
-       };
-
-       vpu_mmu: iommu@ff650800 {
-               dbgname = "vpu";
-               compatible = "rockchip,iommu";
-               reg = <0x0 0xff650800 0x0 0x40>;
-               interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH 0>;
-               interrupt-names = "vpu_mmu";
-               #iommu-cells = <0>;
-       };
-
-       rkvdec: rkvdec@ff660000 {
-               compatible = "rockchip,rkvdec";
-               rockchip,grf = <&grf>;
-               iommus = <&vdec_mmu>;
-               iommu_enabled = <1>;
-               reg = <0x0 0xff660000 0x0 0x400>;
-               interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH 0>;
-               interrupt-names = "irq_dec";
-               clocks = <&cru ACLK_VDU>, <&cru HCLK_VDU>,<&cru SCLK_VDU_CA>,<&cru SCLK_VDU_CORE>;
-               clock-names = "aclk_vcodec", "hclk_vcodec", "clk_cabac", "clk_core";
-               resets = <&cru SRST_H_VDU>, <&cru SRST_A_VDU>;
-               reset-names = "video_h", "video_a";
-               power-domains = <&power RK3399_PD_VDU>;
-               dev_mode = <2>;
-               name = "rkvdec";
-               /* 0 means ion, 1 means drm */
-               allocator = <1>;
-               status = "disabled";
-       };
-
-       vdec_mmu: iommu@ff660480 {
-               dbgname = "vdec";
-               compatible = "rockchip,iommu";
-               reg = <0x0 0xff660480 0x0 0x40>, <0x0 0xff6604c0 0x0 0x40>;
-               interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH 0>;
-               interrupt-names = "vdec_mmu";
-               #iommu-cells = <0>;
-       };
-
        rga: rga@ff680000 {
                compatible = "rockchip,rga2";
                dev_mode = <1>;

diff --git a/arch/arm64/boot/dts/rockchip/rk3399-android.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-android.dtsi
index 720a902c10060ee9a76caf1e1d1f331ceecb480f..b2953c2896d0b7b4aae872418700807ad9090cd3 100644 (file)
--- a/arch/arm64/boot/dts/rockchip/rk3399-android.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399-android.dtsi
@@ -203,60 +203,6 @@
                };
        };
 
-       vpu: vpu_service@ff650000 {
-               compatible = "rockchip,vpu_service";
-               rockchip,grf = <&grf>;
-               iommu_enabled = <1>;
-               reg = <0x0 0xff650000 0x0 0x800>;
-               interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH 0>,
-                       <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH 0>;
-               interrupt-names = "irq_dec", "irq_enc";
-               clocks = <&cru ACLK_VCODEC>, <&cru HCLK_VCODEC>;
-               clock-names = "aclk_vcodec", "hclk_vcodec";
-               resets = <&cru SRST_H_VCODEC>, <&cru SRST_A_VCODEC>;
-               reset-names = "video_h", "video_a";
-               power-domains = <&power RK3399_PD_VCODEC>;
-               name = "vpu_service";
-               dev_mode = <0>;
-               /* 0 means ion, 1 means drm */
-               allocator = <0>;
-       };
-
-       vpu_mmu: vpu_mmu {
-               dbgname = "vpu";
-               compatible = "rockchip,vpu_mmu";
-               reg = <0x0 0xff650800 0x0 0x40>;
-               interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH 0>;
-               interrupt-names = "vpu_mmu";
-       };
-
-       rkvdec: rkvdec@ff660000 {
-               compatible = "rockchip,rkvdec";
-               rockchip,grf = <&grf>;
-               iommu_enabled = <1>;
-               reg = <0x0 0xff660000 0x0 0x400>;
-               interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH 0>;
-               interrupt-names = "irq_dec";
-               clocks = <&cru ACLK_VDU>, <&cru HCLK_VDU>,<&cru SCLK_VDU_CA>,<&cru SCLK_VDU_CORE>;
-               clock-names = "aclk_vcodec", "hclk_vcodec", "clk_cabac", "clk_core";
-               resets = <&cru SRST_H_VDU>, <&cru SRST_A_VDU>;
-               reset-names = "video_h", "video_a";
-               power-domains = <&power RK3399_PD_VDU>;
-               dev_mode = <2>;
-               name = "rkvdec";
-               /* 0 means ion, 1 means drm */
-               allocator = <0>;
-       };
-
-       vdec_mmu: vdec_mmu {
-               dbgname = "vdec";
-               compatible = "rockchip,vdec_mmu";
-               reg = <0x0 0xff660480 0x0 0x40>,
-                     <0x0 0xff6604c0 0x0 0x40>;
-               interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH 0>;
-               interrupt-names = "vdec_mmu";
-       };
-
        iep: iep@ff670000 {
                compatible = "rockchip,iep";
                iommu_enabled = <1>;
@@ -534,6 +480,30 @@
        };
 };
 
+&vpu {
+       status = "okay";
+       /delete-property/ iommus;
+       /* 0 means ion, 1 means drm */
+       allocator = <0>;
+};
+
+&vpu_mmu {
+       dbgname = "vpu";
+       compatible = "rockchip,vpu_mmu";
+};
+
+&rkvdec {
+       status = "okay";
+       /delete-property/ iommus;
+       /* 0 means ion, 1 means drm */
+       allocator = <0>;
+};
+
+&vdec_mmu {
+       dbgname = "vdec";
+       compatible = "rockchip,vdec_mmu";
+};
+
 &pinctrl {
        isp {
                cif_clkout: cif-clkout {

diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index 808c081377fe17a27c85b1022b941589be2e25a4..4c56705547bcb7c8c89aef97d069395c0e3401a7 100644 (file)
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -1291,6 +1291,65 @@
                status = "disabled";
        };
 
+       vpu: vpu_service@ff650000 {
+               compatible = "rockchip,vpu_service";
+               rockchip,grf = <&grf>;
+               iommus = <&vpu_mmu>;
+               iommu_enabled = <1>;
+               reg = <0x0 0xff650000 0x0 0x800>;
+               interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH 0>,
+                            <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH 0>;
+               interrupt-names = "irq_dec", "irq_enc";
+               clocks = <&cru ACLK_VCODEC>, <&cru HCLK_VCODEC>;
+               clock-names = "aclk_vcodec", "hclk_vcodec";
+               resets = <&cru SRST_H_VCODEC>, <&cru SRST_A_VCODEC>;
+               reset-names = "video_h", "video_a";
+               power-domains = <&power RK3399_PD_VCODEC>;
+               name = "vpu_service";
+               dev_mode = <0>;
+               /* 0 means ion, 1 means drm */
+               allocator = <1>;
+               status = "disabled";
+       };
+
+       vpu_mmu: iommu@ff650800 {
+               compatible = "rockchip,iommu";
+               reg = <0x0 0xff650800 0x0 0x40>;
+               interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH 0>;
+               interrupt-names = "vpu_mmu";
+               #iommu-cells = <0>;
+       };
+
+       rkvdec: rkvdec@ff660000 {
+               compatible = "rockchip,rkvdec";
+               rockchip,grf = <&grf>;
+               iommus = <&vdec_mmu>;
+               iommu_enabled = <1>;
+               reg = <0x0 0xff660000 0x0 0x400>;
+               interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH 0>;
+               interrupt-names = "irq_dec";
+               clocks = <&cru ACLK_VDU>, <&cru HCLK_VDU>,
+                        <&cru SCLK_VDU_CA>, <&cru SCLK_VDU_CORE>;
+               clock-names = "aclk_vcodec", "hclk_vcodec",
+                             "clk_cabac", "clk_core";
+               resets = <&cru SRST_H_VDU>, <&cru SRST_A_VDU>;
+               reset-names = "video_h", "video_a";
+               power-domains = <&power RK3399_PD_VDU>;
+               dev_mode = <2>;
+               name = "rkvdec";
+               /* 0 means ion, 1 means drm */
+               allocator = <1>;
+               status = "disabled";
+       };
+
+       vdec_mmu: iommu@ff660480 {
+               compatible = "rockchip,iommu";
+               reg = <0x0 0xff660480 0x0 0x40>, <0x0 0xff6604c0 0x0 0x40>;
+               interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH 0>;
+               interrupt-names = "vdec_mmu";
+               #iommu-cells = <0>;
+       };
+
        rga: rga@ff680000 {
                compatible = "rockchip,rk3399-rga";
                reg = <0x0 0xff680000 0x0 0x10000>;