drm/i915: fix per-pipe reads after "cleanup"
authorJesse Barnes <jbarnes@virtuousgeek.org>
Thu, 17 Feb 2011 18:40:53 +0000 (10:40 -0800)
committerChris Wilson <chris@chris-wilson.co.uk>
Tue, 22 Feb 2011 15:55:49 +0000 (15:55 +0000)
In a few places I replaced reads of per-pipe registers with the actual
register offsets themselves (converting I915_READ(reg) to _PIPE(reg)).
Alexey caught this on his 9xx machine because the cursor control write
was affected.  A quick audit showed a few more places where I'd borked
a read, so here's a patch to fix things up.

Reported-by: Alexey Fisher <bug-track@fisher-privat.net>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
[ickle: compilation fix]
Tested-by: Alexey Fisher <bug-track@fisher-privat.net>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
drivers/gpu/drm/i915/intel_display.c

index 6bda30dae400e50b3527d004b029d530cb9c2250..1a15438512f1524883581af59acdc2f20fccd1fe 100644 (file)
@@ -5220,7 +5220,7 @@ static void i9xx_update_cursor(struct drm_crtc *crtc, u32 base)
        bool visible = base != 0;
 
        if (intel_crtc->cursor_visible != visible) {
-               uint32_t cntl = CURCNTR(pipe);
+               uint32_t cntl = I915_READ(CURCNTR(pipe));
                if (base) {
                        cntl &= ~(CURSOR_MODE | MCURSOR_PIPE_SELECT);
                        cntl |= CURSOR_MODE_64_ARGB_AX | MCURSOR_GAMMA_ENABLE;
@@ -5590,7 +5590,7 @@ static int intel_crtc_clock_get(struct drm_device *dev, struct drm_crtc *crtc)
        struct drm_i915_private *dev_priv = dev->dev_private;
        struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
        int pipe = intel_crtc->pipe;
-       u32 dpll = DPLL(pipe);
+       u32 dpll = I915_READ(DPLL(pipe));
        u32 fp;
        intel_clock_t clock;
 
@@ -5675,13 +5675,14 @@ static int intel_crtc_clock_get(struct drm_device *dev, struct drm_crtc *crtc)
 struct drm_display_mode *intel_crtc_mode_get(struct drm_device *dev,
                                             struct drm_crtc *crtc)
 {
+       struct drm_i915_private *dev_priv = dev->dev_private;
        struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
        int pipe = intel_crtc->pipe;
        struct drm_display_mode *mode;
-       int htot = HTOTAL(pipe);
-       int hsync = HSYNC(pipe);
-       int vtot = VTOTAL(pipe);
-       int vsync = VSYNC(pipe);
+       int htot = I915_READ(HTOTAL(pipe));
+       int hsync = I915_READ(HSYNC(pipe));
+       int vtot = I915_READ(VTOTAL(pipe));
+       int vsync = I915_READ(VSYNC(pipe));
 
        mode = kzalloc(sizeof(*mode), GFP_KERNEL);
        if (!mode)