move a single test case to where most other instcombine shuffle bug test cases exist

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253784 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/test/Transforms/InstCombine/pr20059.ll b/test/Transforms/InstCombine/pr20059.ll
deleted file mode 100644 (file)
index 0ef3159..0000000
--- a/test/Transforms/InstCombine/pr20059.ll
+++ /dev/null
@@ -1,16 +0,0 @@
-; RUN: opt -S -instcombine < %s | FileCheck %s
-
-; In PR20059 ( http://llvm.org/pr20059 ), shufflevector operations are reordered/removed
-; for an srem operation. This is not a valid optimization because it may cause a trap
-; on div-by-zero.
-
-; CHECK-LABEL: @do_not_reorder
-; CHECK: %splat1 = shufflevector <4 x i32> %p1, <4 x i32> undef, <4 x i32> zeroinitializer
-; CHECK-NEXT: %splat2 = shufflevector <4 x i32> %p2, <4 x i32> undef, <4 x i32> zeroinitializer
-; CHECK-NEXT: %retval = srem <4 x i32> %splat1, %splat2
-define <4 x i32> @do_not_reorder(<4 x i32> %p1, <4 x i32> %p2) {
-  %splat1 = shufflevector <4 x i32> %p1, <4 x i32> undef, <4 x i32> zeroinitializer
-  %splat2 = shufflevector <4 x i32> %p2, <4 x i32> undef, <4 x i32> zeroinitializer
-  %retval = srem <4 x i32> %splat1, %splat2
-  ret <4 x i32> %retval
-}

diff --git a/test/Transforms/InstCombine/vec_shuffle.ll b/test/Transforms/InstCombine/vec_shuffle.ll
index d4d7f167ef072342f9d55240097249b839d81cc0..8db13b67e2fe8a2682d3dac64cf216b118a2072a 100644 (file)
--- a/test/Transforms/InstCombine/vec_shuffle.ll
+++ b/test/Transforms/InstCombine/vec_shuffle.ll
@@ -406,6 +406,21 @@ define i32 @pr19737(<4 x i32> %in0) {
   ret i32 %rv
 }
 
+; In PR20059 ( http://llvm.org/pr20059 ), shufflevector operations are reordered/removed
+; for an srem operation. This is not a valid optimization because it may cause a trap
+; on div-by-zero.
+
+define <4 x i32> @pr20059(<4 x i32> %p1, <4 x i32> %p2) {
+; CHECK-LABEL: @pr20059(
+; CHECK-NEXT: %splat1 = shufflevector <4 x i32> %p1, <4 x i32> undef, <4 x i32> zeroinitializer
+; CHECK-NEXT: %splat2 = shufflevector <4 x i32> %p2, <4 x i32> undef, <4 x i32> zeroinitializer
+; CHECK-NEXT: %retval = srem <4 x i32> %splat1, %splat2
+  %splat1 = shufflevector <4 x i32> %p1, <4 x i32> undef, <4 x i32> zeroinitializer
+  %splat2 = shufflevector <4 x i32> %p2, <4 x i32> undef, <4 x i32> zeroinitializer
+  %retval = srem <4 x i32> %splat1, %splat2
+  ret <4 x i32> %retval
+}
+
 define <4 x i32> @pr20114(<4 x i32> %__mask) {
 ; CHECK-LABEL: @pr20114
 ; CHECK: shufflevector