delete RK3288_GRF_GPIO0_D_IOMUX according to new datasheet
authorluowei <lw@rock-chips.com>
Fri, 28 Mar 2014 09:13:25 +0000 (17:13 +0800)
committerluowei <lw@rock-chips.com>
Fri, 28 Mar 2014 09:13:25 +0000 (17:13 +0800)
arch/arm/boot/dts/rk3288-pinctrl.dtsi
drivers/pinctrl/pinctrl-rockchip.c
include/dt-bindings/pinctrl/rockchip-rk3288.h
include/linux/rockchip/grf.h

index 5fd8547cd81531ee02870c03f327e5dea60c5722..db96403a29d815bc5a1f17ccb4f475310bb39a86 100755 (executable)
@@ -17,7 +17,7 @@
                gpio0: gpio0@ff750000 {
                        compatible = "rockchip,rk3288-gpio-bank0";
                        reg =   <0xff750000 0x100>,
-                               <0xff730084 0x10>,
+                               <0xff730084 0x0c>,
                                <0xff730064 0x0c>,
                                <0xff730070 0x0c>;
                        reg-names = "base", "mux_bank0", "pull_bank0", "drv_bank0";
index 4614275677f18a714ea43691f1a735edef47fdcb..b875374722c0574994933ced27bfa6ee5494d3f8 100755 (executable)
@@ -346,7 +346,7 @@ static ssize_t  pinctrl_show_regs(struct file *file, char __user *user_buf,
                len += snprintf(buf + len, PINCTRL_REGS_BUFSIZE - len,
                                "=================================\n");                 
 
-               for(i=0; i<0x10; i=i+4)
+               for(i=0; i<0x0c; i=i+4)
                {
                        value = readl_relaxed(bank0->reg_mux_bank0 + i);
                        len += snprintf(buf + len, PINCTRL_REGS_BUFSIZE - len, "MUX_BANK0[0x%p+0x%x]=0x%08x\n",(int *)bank0->reg_mux_bank0, i, value);
@@ -654,7 +654,10 @@ static int rockchip_set_rk32_mux(struct rockchip_pin_bank *bank, int pin, int mu
                case 0:
                //pmu
                reg = bank->reg_mux_bank0;
-               bits = 2;       
+               if((m.mux.goff == 0x0a) || (m.mux.goff == 0x0b) || (m.mux.goff == 0x0c))
+               {
+                       bits = 2;
+               }
                rk32_iomux_bit_op(bank, pin, mux, reg, bits);
                break;
                
index 1d70f1f3cfbdf1c126a28391002715e7e4913be6..64afe3e61021a4d2326961ae5af114ef526714b3 100755 (executable)
 #define GPIO0_C2 0x0c20
 
 
-
-/* GPIO0_D */
-#define GPIO0_D0 0x0d00
-#define LCDC0_HSYNC_GPIO0D 0x0d01
-
-#define GPIO0_D1 0x0d10
-#define LCDC0_VSYNC_GPIO0D 0x0d11
-
-#define GPIO0_D2 0x0d20
-#define LCDC0_DEN_GPIO0D 0x0d21
-
-#define GPIO0_D3 0x0d30
-#define LCDC0_DCLK_GPIO0D 0x0d31
-
-
 /* GPIO1_A */
 /* GPIO1_B */
 /* GPIO1_C */
index 15a2c580b449d0b7c54f58bbda473037ebc221ea..68191976855293265a30de414d7e0e9c28ec97b3 100755 (executable)
 #define RK3288_GRF_GPIO0_A_IOMUX       0x0084
 #define RK3288_GRF_GPIO0_B_IOMUX       0x0088
 #define RK3288_GRF_GPIO0_C_IOMUX       0x008c
-#define RK3288_GRF_GPIO0_D_IOMUX       0x0090
 
 #define RK3288_GRF_GPIO1D_IOMUX         0x000c
 #define RK3288_GRF_GPIO2A_IOMUX         0x0010