Can't commute shufps. The high / low parts elements come from different vectors.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29275 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/X86/X86InstrInfo.cpp b/lib/Target/X86/X86InstrInfo.cpp
index c566b48aae5ad58914edba928186a68ae16193a6..47388eae48363b7ca5054fd93b1df1da9467c13c 100644 (file)
--- a/lib/Target/X86/X86InstrInfo.cpp
+++ b/lib/Target/X86/X86InstrInfo.cpp
@@ -207,24 +207,6 @@ MachineInstr *X86InstrInfo::convertToThreeAddress(MachineInstr *MI) const {
 ///
 MachineInstr *X86InstrInfo::commuteInstruction(MachineInstr *MI) const {
   switch (MI->getOpcode()) {
-  case X86::SHUFPSrri: { // A = SHUFPSrri B,C, M -> A = SHUFPSrri C,B, rotl(M,4)
-    unsigned A = MI->getOperand(0).getReg();
-    unsigned B = MI->getOperand(1).getReg();
-    unsigned C = MI->getOperand(2).getReg();
-    unsigned M = MI->getOperand(3).getImmedValue();
-    if (B == C) return 0;
-    return BuildMI(X86::SHUFPSrri, 3, A).addReg(C).addReg(B).
-      addImm(((M & 0xF) << 4) | ((M & 0xF0) >> 4));
-  }
-  case X86::SHUFPDrri: { // A = SHUFPDrri B,C, M -> A = SHUFPDrri C,B, rotl(M,1)
-    unsigned A = MI->getOperand(0).getReg();
-    unsigned B = MI->getOperand(1).getReg();
-    unsigned C = MI->getOperand(2).getReg();
-    unsigned M = MI->getOperand(3).getImmedValue();
-    if (B == C) return 0;
-    return BuildMI(X86::SHUFPDrri, 3, A).addReg(C).addReg(B).
-      addImm(((M & 0x1) << 1) | ((M & 0x2) >> 1));
-  }
   case X86::SHRD16rri8: // A = SHRD16rri8 B, C, I -> A = SHLD16rri8 C, B, (16-I)
   case X86::SHLD16rri8: // A = SHLD16rri8 B, C, I -> A = SHRD16rri8 C, B, (16-I)
   case X86::SHRD32rri8: // A = SHRD32rri8 B, C, I -> A = SHLD32rri8 C, B, (32-I)

diff --git a/lib/Target/X86/X86InstrSSE.td b/lib/Target/X86/X86InstrSSE.td
index 81153d4151045fac58075c83d8dd0a83c6565bac..b6b0ddaa3fb4c250caf8f5306cb620dae82dea3c 100644 (file)
--- a/lib/Target/X86/X86InstrSSE.td
+++ b/lib/Target/X86/X86InstrSSE.td
@@ -1223,7 +1223,7 @@ def CMPPDrmi : PDIi8<0xC2, MRMSrcMem,
 
 // Shuffle and unpack instructions
 let isTwoAddress = 1 in {
-let isCommutable = 1, isConvertibleToThreeAddress = 1 in // Convert to pshufd
+let isConvertibleToThreeAddress = 1 in // Convert to pshufd
 def SHUFPSrri : PSIi8<0xC6, MRMSrcReg, 
                      (ops VR128:$dst, VR128:$src1, VR128:$src2, i32i8imm:$src3),
                      "shufps {$src3, $src2, $dst|$dst, $src2, $src3}",
@@ -1236,7 +1236,6 @@ def SHUFPSrmi : PSIi8<0xC6, MRMSrcMem,
                      [(set VR128:$dst, (v4f32 (vector_shuffle
                                                VR128:$src1, (load addr:$src2),
                                                SHUFP_shuffle_mask:$src3)))]>;
-let isCommutable = 1 in
 def SHUFPDrri : PDIi8<0xC6, MRMSrcReg, 
                      (ops VR128:$dst, VR128:$src1, VR128:$src2, i8imm:$src3),
                      "shufpd {$src3, $src2, $dst|$dst, $src2, $src3}",