ARM64: dts: rk3399: add mipi node

Change-Id: I06562ff3b62efa38f84ac892513725dcf4559471
Signed-off-by: Chris Zhong <zyw@rock-chips.com>
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>

diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index f548fd4cdb1109af11f2e860b91bbc10eb935f57..e6137c57359e9b9ab3d460282d7cec6c47fee3e6 100644 (file)
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -1022,6 +1022,11 @@
                vopl_out: port {
                        #address-cells = <1>;
                        #size-cells = <0>;
+
+                       vopl_out_mipi: endpoint@1 {
+                               reg = <1>;
+                               remote-endpoint = <&mipi_in_vopl>;
+                       };
                };
        };
 
@@ -1048,6 +1053,11 @@
                vopb_out: port {
                        #address-cells = <1>;
                        #size-cells = <0>;
+
+                       vopb_out_mipi: endpoint@1 {
+                               reg = <1>;
+                               remote-endpoint = <&mipi_in_vopb>;
+                       };
                };
        };
 
@@ -1060,6 +1070,39 @@
                status = "disabled";
        };
 
+       mipi_dsi: mipi@ff960000 {
+               compatible = "rockchip,rk3399-mipi-dsi", "snps,dw-mipi-dsi";
+               reg = <0x0 0xff960000 0x0 0x8000>;
+               interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&cru SCLK_MIPIDPHY_REF>, <&cru PCLK_MIPI_DSI0>,
+                        <&cru SCLK_DPHY_TX0_CFG>;
+               clock-names = "ref", "pclk", "phy_cfg";
+               rockchip,grf = <&grf>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+               status = "disabled";
+
+               ports {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       reg = <1>;
+
+                       mipi_in: port {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+
+                               mipi_in_vopb: endpoint@0 {
+                                       reg = <0>;
+                                       remote-endpoint = <&vopb_out_mipi>;
+                               };
+                               mipi_in_vopl: endpoint@1 {
+                                       reg = <1>;
+                                       remote-endpoint = <&vopl_out_mipi>;
+                               };
+                       };
+               };
+       };
+
        display_subsystem: display-subsystem {
                compatible = "rockchip,display-subsystem";
                ports = <&vopl_out>, <&vopb_out>;