rk: ddr_freq: version 2.1
author黄涛 <huangtao@rock-chips.com>
Fri, 1 Feb 2013 09:37:55 +0000 (17:37 +0800)
committer黄涛 <huangtao@rock-chips.com>
Fri, 1 Feb 2013 09:39:44 +0000 (17:39 +0800)
fix this bug:
BUG: scheduling while atomic: ddrfreqd/65/0x00000002
[<c043e504>] (unwind_backtrace+0x0/0xf8) from [<c08fe368>] (__schedule+0x7ec/0x8a8)
[<c08fe368>] (__schedule+0x7ec/0x8a8) from [<c08ff620>] (__mutex_lock_slowpath+0x128/0x1bc)
[<c08ff620>] (__mutex_lock_slowpath+0x128/0x1bc) from [<c08ff720>] (mutex_lock+0x6c/0x70)
[<c08ff720>] (mutex_lock+0x6c/0x70) from [<c045328c>] (ddr_scale_rate_for_dvfs+0x30/0x16c)
[<c045328c>] (ddr_scale_rate_for_dvfs+0x30/0x16c) from [<c044da6c>] (dvfs_target+0x12c/0x1a0)
[<c044da6c>] (dvfs_target+0x12c/0x1a0) from [<c0453b10>] (dvfs_set_rate+0x48/0x68)
[<c0453b10>] (dvfs_set_rate+0x48/0x68) from [<c0453504>] (ddrfreq_mode+0x70/0xc4)
[<c0453504>] (ddrfreq_mode+0x70/0xc4) from [<c04536c8>] (ddrfreq_task+0x38/0x160)
[<c04536c8>] (ddrfreq_task+0x38/0x160) from [<c048a704>] (kthread+0x80/0x88)
[<c048a704>] (kthread+0x80/0x88) from [<c04399c8>] (kernel_thread_exit+0x0/0x8)

arch/arm/plat-rk/ddr_freq.c

index f46d8d412b62393e02b9d274c2408d9fb409500d..8a2a3184b97305e85f2216ca963d6aa25d98562f 100644 (file)
@@ -165,7 +165,8 @@ static void _ddr_change_freq(uint32_t nMHz)
 {
        u32 timeout = MAX_TIMEOUT;
        unsigned int cpu;
-       unsigned int this_cpu = get_cpu();
+       unsigned int this_cpu = smp_processor_id();
+
        cpu_maps_update_begin();
 
        set_other_cpus_pause(false);
@@ -187,7 +188,6 @@ static void _ddr_change_freq(uint32_t nMHz)
 
 out:
        cpu_maps_update_done();
-       put_cpu();
 }
 #else
 static void _ddr_change_freq(uint32_t nMHz)
@@ -416,7 +416,7 @@ static int ddrfreq_late_init(void)
        kthread_bind(ddr.task, 0);
        wake_up_process(ddr.task);
 
-       pr_info("verion 2.0\n");
+       pr_info("verion 2.1\n");
        dprintk(DEBUG_DDR, "normal %luMHz video %luMHz idle %luMHz suspend %luMHz\n",
                ddr.normal_rate / MHZ, ddr.video_rate / MHZ, ddr.idle_rate / MHZ, ddr.suspend_rate / MHZ);