clk: samsung: exynos7: Correct CMU_CCORE clocks names

This patch renames CMU_CCORE clocks names to match with user manual.

Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>

diff --git a/drivers/clk/samsung/clk-exynos7.c b/drivers/clk/samsung/clk-exynos7.c
index b888efd4ded8d225d039b53ba6eba175bd12b87b..4dedfcf1181469d164dd77019bcd48749bcf01a7 100644 (file)
--- a/drivers/clk/samsung/clk-exynos7.c
+++ b/drivers/clk/samsung/clk-exynos7.c
@@ -549,7 +549,7 @@ CLK_OF_DECLARE(exynos7_clk_top1, "samsung,exynos7-clock-top1",
 /*
  * List of parent clocks for Muxes in CMU_CCORE
  */
-PNAME(mout_aclk_ccore_133_p)   = { "fin_pll", "dout_aclk_ccore_133" };
+PNAME(mout_aclk_ccore_133_user_p)      = { "fin_pll", "aclk_ccore_133" };
 
 static unsigned long ccore_clk_regs[] __initdata = {
        MUX_SEL_CCORE,
@@ -557,7 +557,7 @@ static unsigned long ccore_clk_regs[] __initdata = {
 };
 
 static struct samsung_mux_clock ccore_mux_clks[] __initdata = {
-       MUX(0, "mout_aclk_ccore_133_user", mout_aclk_ccore_133_p,
+       MUX(0, "mout_aclk_ccore_133_user", mout_aclk_ccore_133_user_p,
                MUX_SEL_CCORE, 1, 1),
 };