rk3026: usb: phy parameter tuning
authorlyz <lyz@rock-chips.com>
Tue, 5 Nov 2013 02:45:08 +0000 (10:45 +0800)
committerlyz <lyz@rock-chips.com>
Tue, 5 Nov 2013 02:45:08 +0000 (10:45 +0800)
drivers/usb/dwc_otg/usbdev_rk3026.c
drivers/usb/dwc_otg/usbdev_rk3026_grf_regs.h [new file with mode: 0755]

index 3034475d011f79fc44f541b581575f678c82ea72..551ff8589f38cae9957d1963b50d297f8d2774ea 100755 (executable)
 
 #include "usbdev_rk.h"
 #include "dwc_otg_regs.h"
-#ifdef CONFIG_ARCH_RK3026
-
-#define GRF_REG_BASE RK2928_GRF_BASE
-#define USBOTG_SIZE    RK2928_USBOTG20_SIZE
-
-#define USBGRF_SOC_STATUS0     (GRF_REG_BASE+0x14c)
-
-#define USBGRF_UOC0_CON0       (GRF_REG_BASE+0x17c)
-#define USBGRF_UOC1_CON0    (GRF_REG_BASE+0X190)
-#define USBGRF_UOC1_CON1       (GRF_REG_BASE+0x194)
 
+#ifdef CONFIG_ARCH_RK3026
+#include "usbdev_rk3026_grf_regs.h"
 
 int dwc_otg_check_dpdm(void)
 {
@@ -108,8 +100,11 @@ void usb20otg_hw_init(void)
     unsigned int * otg_phy_con1 = (unsigned int*)(USBGRF_UOC1_CON1);
     *otg_phy_con1 = 0x1D5 |(0x1ff<<16);   // enter suspend.
 #endif
+
     // usb phy config init
-    
+    pGRF_USBPHY_REG GRF_USBPHY0 = (pGRF_USBPHY_REG)GRF_USBPHY0_CON_BASE;
+    GRF_USBPHY0->CON0 = 0x00070007;//open pre-emphasize for otg
+
     // other hardware init
 #ifdef CONFIG_RK_CONFIG
     otg_drv_init(0);
@@ -295,7 +290,9 @@ static struct resource usb20_host_resource[] = {
 void usb20host_hw_init(void)
 {
     // usb phy config init
-
+    pGRF_USBPHY_REG GRF_USBPHY1 = (pGRF_USBPHY_REG)GRF_USBPHY1_CON_BASE;
+    GRF_USBPHY1->CON7 = 0x78000000;//host_discon_con 575mv
+    
     // other haredware init
 #ifdef CONFIG_RK_CONFIG
     host_drv_init(1);
diff --git a/drivers/usb/dwc_otg/usbdev_rk3026_grf_regs.h b/drivers/usb/dwc_otg/usbdev_rk3026_grf_regs.h
new file mode 100755 (executable)
index 0000000..1116048
--- /dev/null
@@ -0,0 +1,28 @@
+#ifndef __USBDEV_RK3026_GRF_REGS_H__
+#define __USBDEV_RK3026_GRF_REGS_H__
+
+#define GRF_REG_BASE RK2928_GRF_BASE
+#define USBOTG_SIZE    RK2928_USBOTG20_SIZE
+
+#define GRF_USBPHY0_CON_BASE     (GRF_REG_BASE+0x280)
+#define GRF_USBPHY1_CON_BASE     (GRF_REG_BASE+0x2a0)
+
+#define USBGRF_SOC_STATUS0     (GRF_REG_BASE+0x14c)
+
+#define USBGRF_UOC0_CON0       (GRF_REG_BASE+0x17c)
+#define USBGRF_UOC1_CON0    (GRF_REG_BASE+0X190)
+#define USBGRF_UOC1_CON1       (GRF_REG_BASE+0x194)
+
+typedef volatile struct tag_grf_usbphy_regs
+{
+    u32 CON0;
+    u32 CON1;
+    u32 CON2;
+    u32 CON3;
+    u32 CON4;
+    u32 CON5;
+    u32 CON6;
+    u32 CON7;
+} GRF_USBPHY_REG ,*pGRF_USBPHY_REG;
+
+#endif
\ No newline at end of file