fix setcc on floats, fixes singlesource:pi, perhaps others

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20172 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/Alpha/AlphaISelPattern.cpp b/lib/Target/Alpha/AlphaISelPattern.cpp
index 30386d8bd810b8662936a02e94bad6da7efae769..9b0b2ccbbebfe940b8b86693001c1d8a0fcf2033 100644 (file)
--- a/lib/Target/Alpha/AlphaISelPattern.cpp
+++ b/lib/Target/Alpha/AlphaISelPattern.cpp
@@ -63,6 +63,8 @@ namespace {
       setOperationAction(ISD::MEMSET           , MVT::Other, Expand);
       setOperationAction(ISD::MEMCPY           , MVT::Other, Expand);
 
+      setOperationAction(ISD::SETCC            , MVT::f32,   Promote);
+
       computeRegisterProperties();
       
       addLegalFPImmediate(+0.0); //F31
@@ -1109,15 +1111,17 @@ unsigned ISel::SelectExpr(SDOperand N) {
           //Can only compare doubles, and dag won't promote for me
           if (SetCC->getOperand(0).getValueType() == MVT::f32)
           {
+            std::cerr << "Setcc On float?\n";
             Tmp3 = MakeReg(MVT::f64);
             BuildMI(BB, Alpha::CVTST, 1, Tmp3).addReg(Tmp1);
             Tmp1 = Tmp3;
           }
           if (SetCC->getOperand(1).getValueType() == MVT::f32)
           {
+            std::cerr << "Setcc On float?\n";
             Tmp3 = MakeReg(MVT::f64);
             BuildMI(BB, Alpha::CVTST, 1, Tmp3).addReg(Tmp2);
-            Tmp1 = Tmp2;
+            Tmp2 = Tmp3;
           }
 
           if (rev) std::swap(Tmp1, Tmp2);