UPSTREAM: clk: rockchip: add clock-id for rk3036 emac pll source clock

Suitable PLLs for the emac on the rk3036 are difficult to find
and one of them is the (continuously changing) APLL. So in most
cases it will be necessary to select a PLL manually.
So add a clock-id for it.

Change-Id: Ic7e1c870744342c282ba2d86ae61650476b336e1
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Cc: Xing Zheng <zhengxing@rock-chips.com>
Cc: Michael Turquette <mturquette@baylibre.com>
Cc: Heiko Stuebner <heiko@sntech.de>
Cc: Stephen Boyd <sboyd@codeaurora.org>
Cc: linux-clk@vger.kernel.org
Cc: linux-rockchip@lists.infradead.org
Signed-off-by: David S. Miller <davem@davemloft.net>
(cherry picked from git.kernel.org next/linux-next.git master
 commit f7e180222b973a0b363564b281a314276cb2b594)

diff --git a/include/dt-bindings/clock/rk3036-cru.h b/include/dt-bindings/clock/rk3036-cru.h
index 339659115695606c0211225d9f6b22484f8e245c..de44109a3a0429cc92785a38663c651cd3b0e99e 100644 (file)
--- a/include/dt-bindings/clock/rk3036-cru.h
+++ b/include/dt-bindings/clock/rk3036-cru.h
@@ -54,6 +54,7 @@
 #define SCLK_PVTM_VIDEO                125
 #define SCLK_MAC               151
 #define SCLK_MACREF            152
+#define SCLK_MACPLL            153
 #define SCLK_SFC               160
 
 /* aclk gates */