projects
/
firefly-linux-kernel-4.4.55.git
/ commitdiff
commit
grep
author
committer
pickaxe
?
search:
re
summary
|
shortlog
|
log
|
commit
| commitdiff |
tree
raw
|
patch
| inline |
side by side
(parent:
69a800c
)
ARM: decompressor: Flush tlb before swiching domain 0 to client mode
author
Arve Hjønnevåg
<arve@android.com>
Sat, 1 Dec 2012 01:05:40 +0000
(17:05 -0800)
committer
John Stultz
<john.stultz@linaro.org>
Tue, 16 Feb 2016 21:54:08 +0000
(13:54 -0800)
If the bootloader used a page table that is incompatible with domain 0
in client mode, and boots with the mmu on, then swithing domain 0 to
client mode causes a fault if we don't flush the tlb after updating
the page table pointer.
v2: Add ISB before loading dacr.
Signed-off-by: Arve Hjønnevåg <arve@android.com>
arch/arm/boot/compressed/head.S
patch
|
blob
|
history
diff --git
a/arch/arm/boot/compressed/head.S
b/arch/arm/boot/compressed/head.S
index 06e983f59980ffc4c0955891d894bbbbaa5cb5e2..ae85dcdcb7df105abdc399ce619c5413c0b63f5d 100644
(file)
--- a/
arch/arm/boot/compressed/head.S
+++ b/
arch/arm/boot/compressed/head.S
@@
-778,6
+778,8
@@
__armv7_mmu_cache_on:
bic r6, r6, #1 << 31 @ 32-bit translation system
bic r6, r6, #3 << 0 @ use only ttbr0
mcrne p15, 0, r3, c2, c0, 0 @ load page table pointer
+ mcrne p15, 0, r0, c8, c7, 0 @ flush I,D TLBs
+ mcr p15, 0, r0, c7, c5, 4 @ ISB
mcrne p15, 0, r1, c3, c0, 0 @ load domain access control
mcrne p15, 0, r6, c2, c0, 2 @ load ttb control
#endif