rockchip: clk: rk3399: fix up clk tree assigned error
authorElaine Zhang <zhangqing@rock-chips.com>
Mon, 21 Mar 2016 15:10:19 +0000 (23:10 +0800)
committerGerrit Code Review <gerrit@rock-chips.com>
Mon, 21 Mar 2016 15:21:32 +0000 (23:21 +0800)
add some clk id.

Change-Id: Iffc3fbfa557e5d01f70ab0be2d84a85cff7ac34c
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
drivers/clk/rockchip/clk-rk3399.c

index d8ee2d85a9388a1b0e783b0a01e78ea4e49b2d00..702a75cdcb790119c8bb629b370af225c8835175 100644 (file)
@@ -96,6 +96,7 @@ static struct rockchip_pll_rate_table rk3399_pll_rates[] = {
        RK3036_PLL_RATE( 800000000, 6, 400, 2, 1, 1, 0),
        RK3036_PLL_RATE( 700000000, 6, 350, 2, 1, 1, 0),
        RK3036_PLL_RATE( 696000000, 1, 58, 2, 1, 1, 0),
+       RK3036_PLL_RATE( 676000000, 3, 169, 2, 1, 1, 0),
        RK3036_PLL_RATE( 600000000, 1, 75, 3, 1, 1, 0),
        RK3036_PLL_RATE( 594000000, 2, 99, 2, 1, 1, 0),
        RK3036_PLL_RATE( 504000000, 1, 63, 3, 1, 1, 0),
@@ -897,7 +898,7 @@ static struct rockchip_clk_branch rk3399_clk_branches[] __initdata = {
                        RK3399_CLKGATE_CON(7), 1, GFLAGS),
        GATE(0, "gpll_aclk_perilp0_src", "gpll", CLK_IGNORE_UNUSED,
                        RK3399_CLKGATE_CON(7), 0, GFLAGS),
-       COMPOSITE(0, "aclk_perilp0", mux_aclk_perilp0_p, CLK_IGNORE_UNUSED,
+       COMPOSITE(ACLK_PERILP0, "aclk_perilp0", mux_aclk_perilp0_p, CLK_IGNORE_UNUSED,
                        RK3399_CLKSEL_CON(23), 7, 1, MFLAGS, 0, 5, DFLAGS,
                        RK3399_CLKGATE_CON(7), 2, GFLAGS),
        COMPOSITE_NOMUX(HCLK_PERILP0, "hclk_perilp0", "aclk_perilp0", CLK_IGNORE_UNUSED,
@@ -962,7 +963,7 @@ static struct rockchip_clk_branch rk3399_clk_branches[] __initdata = {
                        RK3399_CLKGATE_CON(8), 1, GFLAGS),
        GATE(0, "gpll_hclk_perilp1_src", "gpll", CLK_IGNORE_UNUSED,
                        RK3399_CLKGATE_CON(8), 0, GFLAGS),
-       COMPOSITE_NOGATE(0, "hclk_perilp1", mux_hclk_perilp1_p, CLK_IGNORE_UNUSED,
+       COMPOSITE_NOGATE(HCLK_PERILP1, "hclk_perilp1", mux_hclk_perilp1_p, CLK_IGNORE_UNUSED,
                        RK3399_CLKSEL_CON(25), 7, 1, MFLAGS, 0, 5, DFLAGS),
        COMPOSITE_NOMUX(PCLK_PERILP1, "pclk_perilp1", "hclk_perilp1", CLK_IGNORE_UNUSED,
                        RK3399_CLKSEL_CON(25), 8, 3, DFLAGS,