Change SSE pack operation definitions to fit what the intrinsics expected.

For example, packsswb actually creates a v16i8 from a pair of v8i16. But since
the intrinsic specification forces the output type to match the operands.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27254 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/include/llvm/IntrinsicsX86.td b/include/llvm/IntrinsicsX86.td
index b2f7e63c12bda287b0d71c425af703d5a51b3b21..b22ea6b1e7e6c16e44cfda9c11336b85ce3d18b0 100644 (file)
--- a/include/llvm/IntrinsicsX86.td
+++ b/include/llvm/IntrinsicsX86.td
@@ -288,13 +288,13 @@ let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 // Misc.
 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
   def int_x86_sse2_packsswb_128 : GCCBuiltin<"__builtin_ia32_packsswb128">,
-              Intrinsic<[llvm_v16i8_ty, llvm_v8i16_ty,
+              Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
                          llvm_v8i16_ty], [InstrNoMem]>;
   def int_x86_sse2_packssdw_128 : GCCBuiltin<"__builtin_ia32_packssdw128">,
-              Intrinsic<[llvm_v8i16_ty, llvm_v4i32_ty,
+              Intrinsic<[llvm_v4i32_ty, llvm_v4i32_ty,
                          llvm_v4i32_ty], [InstrNoMem]>;
   def int_x86_sse2_packuswb_128 : GCCBuiltin<"__builtin_ia32_packuswb128">,
-              Intrinsic<[llvm_v16i8_ty, llvm_v8i16_ty,
+              Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
                          llvm_v8i16_ty], [InstrNoMem]>;
   def int_x86_sse2_movmskpd : GCCBuiltin<"__builtin_ia32_movmskpd">,
               Intrinsic<[llvm_int_ty, llvm_v2f64_ty], [InstrNoMem]>;

diff --git a/lib/Target/X86/X86InstrSSE.td b/lib/Target/X86/X86InstrSSE.td
index 2cd954a7a79ab7f6378a5eb9b938b6161317d1e8..132da07a679c00556135e28d68c09dedd35da5f3 100644 (file)
--- a/lib/Target/X86/X86InstrSSE.td
+++ b/lib/Target/X86/X86InstrSSE.td
@@ -1182,39 +1182,39 @@ let isTwoAddress = 1 in {
 def PACKSSWBrr : PDI<0x63, MRMSrcReg, (ops VR128:$dst, VR128:$src1,
                                        VR128:$src2),
                  "packsswb {$src2, $dst|$dst, $src2}",
-                 [(set VR128:$dst, (v16i8 (int_x86_sse2_packsswb_128
-                                           (v8i16 VR128:$src1),
-                                           (v8i16 VR128:$src2))))]>;
+                 [(set VR128:$dst, (v8i16 (int_x86_sse2_packsswb_128
+                                           VR128:$src1,
+                                           VR128:$src2)))]>;
 def PACKSSWBrm : PDI<0x63, MRMSrcMem, (ops VR128:$dst, VR128:$src1,
                                        i128mem:$src2),
                  "packsswb {$src2, $dst|$dst, $src2}",
-                 [(set VR128:$dst, (v16i8 (int_x86_sse2_packsswb_128
-                                           (v8i16 VR128:$src1),
-                                           (loadv8i16 addr:$src2))))]>;
+                 [(set VR128:$dst, (v8i16 (int_x86_sse2_packsswb_128
+                                           VR128:$src1,
+                                         (bc_v8i16 (loadv2f64 addr:$src2)))))]>;
 def PACKSSDWrr : PDI<0x6B, MRMSrcReg, (ops VR128:$dst, VR128:$src1,
                                        VR128:$src2),
-                 "packsswb {$src2, $dst|$dst, $src2}",
-                 [(set VR128:$dst, (v8i16 (int_x86_sse2_packssdw_128
-                                           (v4i32 VR128:$src1),
-                                           (v4i32 VR128:$src2))))]>;
+                 "packssdw {$src2, $dst|$dst, $src2}",
+                 [(set VR128:$dst, (v4i32 (int_x86_sse2_packssdw_128
+                                           VR128:$src1,
+                                           VR128:$src2)))]>;
 def PACKSSDWrm : PDI<0x6B, MRMSrcReg, (ops VR128:$dst, VR128:$src1,
                                        i128mem:$src2),
-                 "packsswb {$src2, $dst|$dst, $src2}",
-                 [(set VR128:$dst, (v8i16 (int_x86_sse2_packssdw_128
-                                           (v4i32 VR128:$src1),
-                                           (loadv4i32 addr:$src2))))]>;
+                 "packssdw {$src2, $dst|$dst, $src2}",
+                 [(set VR128:$dst, (v4i32 (int_x86_sse2_packssdw_128
+                                           VR128:$src1,
+                                         (bc_v4i32 (loadv2i64 addr:$src2)))))]>;
 def PACKUSWBrr : PDI<0x67, MRMSrcReg, (ops VR128:$dst, VR128:$src1,
                                        VR128:$src2),
                      "packuswb {$src2, $dst|$dst, $src2}",
-                 [(set VR128:$dst, (v16i8 (int_x86_sse2_packuswb_128
-                                           (v8i16 VR128:$src1),
-                                           (v8i16 VR128:$src2))))]>;
+                 [(set VR128:$dst, (v8i16 (int_x86_sse2_packuswb_128
+                                           VR128:$src1,
+                                           VR128:$src2)))]>;
 def PACKUSWBrm : PDI<0x67, MRMSrcReg, (ops VR128:$dst, VR128:$src1,
                                        i128mem:$src2),
                      "packuswb {$src2, $dst|$dst, $src2}",
-                 [(set VR128:$dst, (v16i8 (int_x86_sse2_packuswb_128
-                                           (v8i16 VR128:$src1),
-                                           (loadv8i16 addr:$src2))))]>;
+                 [(set VR128:$dst, (v8i16 (int_x86_sse2_packuswb_128
+                                           VR128:$src1,
+                                         (bc_v8i16 (loadv2i64 addr:$src2)))))]>;
 }
 
 // Shuffle and unpack instructions