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ARM: at91/pm: MOR register KEY was missing
author
Patrice Vilchez
<patrice.vilchez@atmel.com>
Thu, 12 Feb 2015 02:52:13 +0000
(10:52 +0800)
committer
Nicolas Ferre
<nicolas.ferre@atmel.com>
Thu, 5 Mar 2015 10:43:02 +0000
(11:43 +0100)
Because writing the MOR register requires the PASSWD(0x37),
if missed, the write operation will be aborted.
Signed-off-by: Patrice Vilchez <patrice.vilchez@atmel.com>
Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
arch/arm/mach-at91/pm_slowclock.S
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diff --git
a/arch/arm/mach-at91/pm_slowclock.S
b/arch/arm/mach-at91/pm_slowclock.S
index a2cc49f96f616e3d12af8190739a7110814ac6f6..8ab80e579be0bb59998b9a93e343ac83143d9611 100644
(file)
--- a/
arch/arm/mach-at91/pm_slowclock.S
+++ b/
arch/arm/mach-at91/pm_slowclock.S
@@
-205,6
+205,7
@@
sdr_sr_done:
/* Turn off the main oscillator */
ldr tmp1, [pmc, #AT91_CKGR_MOR]
bic tmp1, tmp1, #AT91_PMC_MOSCEN
+ orr tmp1, tmp1, #AT91_PMC_KEY
str tmp1, [pmc, #AT91_CKGR_MOR]
/* Wait for interrupt */
@@
-213,6
+214,7
@@
sdr_sr_done:
/* Turn on the main oscillator */
ldr tmp1, [pmc, #AT91_CKGR_MOR]
orr tmp1, tmp1, #AT91_PMC_MOSCEN
+ orr tmp1, tmp1, #AT91_PMC_KEY
str tmp1, [pmc, #AT91_CKGR_MOR]
wait_moscrdy