drm/rockchip: lvds: mipi_lvds_ctl set to mipi dsi controller base address

So we can define reg offset according to TRM, otherwise it will make
us confused.

Change-Id: I1687542fcaf7ac4e6e78d863e8940f6604794407
Signed-off-by: Sandy Huang <hjc@rock-chips.com>

diff --git a/arch/arm64/boot/dts/rockchip/rk3366.dtsi b/arch/arm64/boot/dts/rockchip/rk3366.dtsi
index 434448b607c17a7a63232692189b12336da75011..e1008913374399cf36fc9916cc3636cc18fb5f60 100644 (file)
--- a/arch/arm64/boot/dts/rockchip/rk3366.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3366.dtsi
@@ -1061,7 +1061,7 @@
 
        lvds: lvds@ff968000 {
                compatible = "rockchip,rk3366-lvds";
-               reg = <0x0 0xff968000 0x0 0x4000>, <0x0 0xff9600a0 0x0 0x20>;
+               reg = <0x0 0xff968000 0x0 0x4000>, <0x0 0xff960000 0x0 0x100>;
                reg-names = "mipi_lvds_phy", "mipi_lvds_ctl";
                clocks = <&cru PCLK_DPHYTX>, <&cru PCLK_MIPI_DSI0>;
                clock-names = "pclk_lvds", "pclk_lvds_ctl";

diff --git a/arch/arm64/boot/dts/rockchip/rk3368.dtsi b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
index 167531b4cc6d48b398fd47fed0e8b88db6c04d86..ddcbceaf8efcef2c02c33bf4b354b419730e7c0d 100644 (file)
--- a/arch/arm64/boot/dts/rockchip/rk3368.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
@@ -1462,7 +1462,7 @@
 
        lvds: lvds@ff968000 {
                compatible = "rockchip,rk3368-lvds";
-               reg = <0x0 0xff968000 0x0 0x4000>, <0x0 0xff9600a0 0x0 0x20>;
+               reg = <0x0 0xff968000 0x0 0x4000>, <0x0 0xff960000 0x0 0x100>;
                reg-names = "mipi_lvds_phy", "mipi_lvds_ctl";
                clocks = <&cru PCLK_DPHYTX0>, <&cru PCLK_MIPI_DSI0>;
                clock-names = "pclk_lvds", "pclk_lvds_ctl";

diff --git a/drivers/gpu/drm/rockchip/rockchip_lvds.c b/drivers/gpu/drm/rockchip/rockchip_lvds.c
index f62ec37c1479d2c5d15129cab041de2e83311207..ff23c68cfa351c5c94c099f7aa1b4dc822687d5e 100644 (file)
--- a/drivers/gpu/drm/rockchip/rockchip_lvds.c
+++ b/drivers/gpu/drm/rockchip/rockchip_lvds.c
@@ -110,8 +110,8 @@ static inline u32 lvds_phy_lockon(struct rockchip_lvds *lvds)
 {
        u32 val = 0;
 
-       val = readl_relaxed(lvds->regs_ctrl + 0x10);
-       return (val & 0x01);
+       val = readl_relaxed(lvds->regs_ctrl + MIPIC_PHY_STATUS);
+       return (val & m_PHY_LOCK_STATUS) ? 1 : 0;
 }
 
 static inline int lvds_name_to_format(const char *s)
@@ -239,6 +239,9 @@ static int rk336x_lvds_poweron(struct rockchip_lvds *lvds)
                lvds_msk_reg(lvds, MIPIPHY_REGE3,
                             m_MIPI_EN | m_LVDS_EN | m_TTL_EN,
                             v_MIPI_EN(0) | v_LVDS_EN(0) | v_TTL_EN(1));
+
+               /* set clock lane enable */
+               lvds_dsi_writel(lvds, MIPIC_PHY_RSTZ, m_PHY_ENABLE_CLK);
        } else {
                /* digital internal disable */
                lvds_msk_reg(lvds, MIPIPHY_REGE1,
@@ -529,7 +532,6 @@ static void rockchip_lvds_grf_config(struct drm_encoder *encoder,
                                pinctrl_select_state(lvds->pins->p,
                                                     lvds->pins->default_state);
 
-                       lvds_dsi_writel(lvds, 0x0, 0x4);/*set clock lane enable*/
                        /* enable lvds mode */
                        val = v_RK336X_LVDSMODE_EN(0) |
                                v_RK336X_MIPIPHY_TTL_EN(1) |

diff --git a/drivers/gpu/drm/rockchip/rockchip_lvds.h b/drivers/gpu/drm/rockchip/rockchip_lvds.h
index 28ac030effec5751df54dd3ff82daf50a1b5a49b..62772d51f0406699cae5d030c4cf06108d82dafa 100644 (file)
--- a/drivers/gpu/drm/rockchip/rockchip_lvds.h
+++ b/drivers/gpu/drm/rockchip/rockchip_lvds.h
@@ -178,6 +178,12 @@
 #define v_LANE1_EN(x)          BITS_MASK(x, 1, 6)
 #define v_LANE0_EN(x)          BITS_MASK(x, 1, 7)
 
+/* MIPI DSI Controller register */
+#define MIPIC_PHY_RSTZ         0x00a0
+#define m_PHY_ENABLE_CLK       BIT(2)
+#define MIPIC_PHY_STATUS       0x00b0
+#define m_PHY_LOCK_STATUS      BIT(0)
+
 #define v_RK336X_LVDS_OUTPUT_FORMAT(x) (BITS_MASK(x, 3, 13) | BITS_EN(3, 13))
 #define v_RK336X_LVDS_MSBSEL(x)                (BITS_MASK(x, 1, 11) | BITS_EN(1, 11))
 #define v_RK336X_LVDSMODE_EN(x)                (BITS_MASK(x, 1, 12) | BITS_EN(1, 12))