[X86] Add support for mmword memory operand size for Intel-syntax x86 assembly
authorMichael Zuckerman <Michael.zuckerman@intel.com>
Mon, 24 Aug 2015 10:26:54 +0000 (10:26 +0000)
committerMichael Zuckerman <Michael.zuckerman@intel.com>
Mon, 24 Aug 2015 10:26:54 +0000 (10:26 +0000)
Differential Revision: http://reviews.llvm.org/D12151

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245835 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/X86/AsmParser/X86AsmParser.cpp
test/MC/X86/intel-syntax.s

index c9fa5c137bbe8b6363c94a9a0e3b939c88b8d1e1..85881307f88d93ac95ee5d6a146bd2ca5da9c981 100644 (file)
@@ -1049,8 +1049,8 @@ static unsigned getIntelMemOperandSize(StringRef OpStr) {
     .Cases("WORD", "word", 16)
     .Cases("DWORD", "dword", 32)
     .Cases("QWORD", "qword", 64)
+    .Cases("MMWORD","mmword", 64)
     .Cases("XWORD", "xword", 80)
-    //
     .Cases("TBYTE", "tbyte", 80)
     .Cases("XMMWORD", "xmmword", 128)
     .Cases("YMMWORD", "ymmword", 256)
index 95527b0eff25581c26f49f9930fa6fe3a285d43b..002a6f81dcf58a73dcaa03fca6c277887ae6fbdb 100644 (file)
@@ -705,6 +705,9 @@ repnz cmpsb
 sal eax, 123
 // CHECK: shll $123, %eax
 
+psignw    mm0, MMWORD PTR t2
+// CHECK: psignw t2, %mm0
+
 comisd xmm0, QWORD PTR [eax]
 comiss xmm0, DWORD PTR [eax]
 vcomisd xmm0, QWORD PTR [eax]