include $(LEVEL)/Makefile.common
TARGET = Skeleton
-TDFILES = $(wildcard $(SourceDir)/*.td) $(SourceDir)/../Target.td
+TDFILES = $(SourceDir)/$(TARGET).td $(wildcard $(SourceDir)/*.td) \
+ $(SourceDir)/../Target.td
# Make sure that tblgen is run, first thing.
--- /dev/null
+//===-- Skeleton.h - Target private header file -----------------*- C++ -*-===//
+//
+// The LLVM Compiler Infrastructure
+//
+// This file was developed by the LLVM research group and is distributed under
+// the University of Illinois Open Source License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+//
+// This file contains the definitions shared among the various components of the
+// Skeleton backend.
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef TARGET_SKELETON_H
+#define TARGET_SKELETON_H
+
+#include <iosfwd>
+
+/// Put prototypes here for functions used to create various passes.
+
+
+// Defines symbolic enum names for target registers. This defines a mapping
+// from register name to register number. These are generated by tblgen from
+// your target file.
+//
+#include "SkeletonGenRegisterNames.inc"
+
+// Defines symbolic enum names for the target instructions.
+//
+#include "SkeletonGenInstrNames.inc"
+
+#endif
-//===- PowerPC.td - Describe the PowerPC Target Machine ---------*- C++ -*-===//
+//===- Skeleton.td - Describe the Skeleton Target Machine -------*- C++ -*-===//
//
// The LLVM Compiler Infrastructure
//
let PHIInst = PHI;
}
-def PowerPC : Target {
+def Skeleton : Target {
// Pointers are 32-bits in size.
let PointerType = i32;
--- /dev/null
+//===- SkeletonInstrInfo.cpp - Instruction Information ----------*- C++ -*-===//
+//
+// The LLVM Compiler Infrastructure
+//
+// This file was developed by the LLVM research group and is distributed under
+// the University of Illinois Open Source License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+//
+// This is where you implement methods for the TargetInstrInfo class.
+//
+//===----------------------------------------------------------------------===//
+
+#include "SkeletonInstrInfo.h"
+#include "llvm/CodeGen/MachineInstrBuilder.h"
+#include "SkeletonGenInstrInfo.inc" // Get info from Tablegen
+using namespace llvm;
+
+SkeletonInstrInfo::SkeletonInstrInfo()
+ : TargetInstrInfo(SkeletonInsts,
+ sizeof(SkeletonInsts)/sizeof(SkeletonInsts[0])){
+}
--- /dev/null
+//===- SkeletonInstrInfo.h - Instruction Information ------------*- C++ -*-===//
+//
+// The LLVM Compiler Infrastructure
+//
+// This file was developed by the LLVM research group and is distributed under
+// the University of Illinois Open Source License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+//
+// This file is where the target-specific implementation of the TargetInstrInfo
+// class goes.
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef SKELETON_INSTRUCTIONINFO_H
+#define SKELETON_INSTRUCTIONINFO_H
+
+#include "llvm/Target/TargetInstrInfo.h"
+#include "SkeletonRegisterInfo.h"
+
+namespace llvm {
+
+ class SkeletonInstrInfo : public TargetInstrInfo {
+ const SkeletonRegisterInfo RI;
+ public:
+ SkeletonInstrInfo();
+
+ /// getRegisterInfo - TargetInstrInfo is a superset of MRegister info. As
+ /// such, whenever a client has an instance of instruction info, it should
+ /// always be able to get register info as well (through this method).
+ ///
+ virtual const MRegisterInfo &getRegisterInfo() const { return RI; }
+ };
+}
+
+#endif
bits<4> Value = val;
}
-// All of the PowerPC instruction formats, plus a pseudo-instruction format:
+// Some of the powerpc instruction formats, plus a pseudo-instruction format:
def Pseudo : Format<0>;
def IForm : Format<1>;
def BForm : Format<2>;
--- /dev/null
+//===-- SkeletonCodeEmitter.cpp - JIT Code Emitter --------------*- C++ -*-===//
+//
+// The LLVM Compiler Infrastructure
+//
+// This file was developed by the LLVM research group and is distributed under
+// the University of Illinois Open Source License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+//
+// This is a stub for a JIT code generator, which is obviously not implemented.
+//
+//===----------------------------------------------------------------------===//
+
+#include "SkeletonTargetMachine.h"
+using namespace llvm;
+
+/// addPassesToEmitMachineCode - Add passes to the specified pass manager to get
+/// machine code emitted. This uses a MachineCodeEmitter object to handle
+/// actually outputting the machine code and resolving things like the address
+/// of functions. This method should returns true if machine code emission is
+/// not supported.
+///
+bool SkeletonTargetMachine::addPassesToEmitMachineCode(FunctionPassManager &PM,
+ MachineCodeEmitter &MCE){
+ return true; // Not implemented yet!
+}
+
+void *SkeletonJITInfo::getJITStubForFunction(Function *F,
+ MachineCodeEmitter &MCE) {
+ assert (0 && "getJITStubForFunction not implemented");
+ return 0;
+}
+
+void SkeletonJITInfo::replaceMachineCodeForFunction (void *Old, void *New) {
+ assert (0 && "replaceMachineCodeForFunction not implemented");
+}
+
--- /dev/null
+//===- SkeletonJITInfo.h - Skeleton impl of JIT interface -------*- C++ -*-===//
+//
+// The LLVM Compiler Infrastructure
+//
+// This file was developed by the LLVM research group and is distributed under
+// the University of Illinois Open Source License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+//
+// This file contains the skeleton implementation of the TargetJITInfo class.
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef SKELETONJITINFO_H
+#define SKELETONJITINFO_H
+
+#include "llvm/Target/TargetJITInfo.h"
+
+namespace llvm {
+ class TargetMachine;
+ class IntrinsicLowering;
+
+ class SkeletonJITInfo : public TargetJITInfo {
+ TargetMachine &TM;
+ public:
+ SkeletonJITInfo(TargetMachine &tm) : TM(tm) {}
+
+ /// addPassesToJITCompile - Add passes to the specified pass manager to
+ /// implement a fast dynamic compiler for this target. Return true if this
+ /// is not supported for this target.
+ ///
+ virtual void addPassesToJITCompile(FunctionPassManager &PM);
+
+ /// replaceMachineCodeForFunction - Make it so that calling the function
+ /// whose machine code is at OLD turns into a call to NEW, perhaps by
+ /// overwriting OLD with a branch to NEW. This is used for self-modifying
+ /// code.
+ ///
+ virtual void replaceMachineCodeForFunction(void *Old, void *New);
+
+ /// getJITStubForFunction - Create or return a stub for the specified
+ /// function. This stub acts just like the specified function, except that
+ /// it allows the "address" of the function to be taken without having to
+ /// generate code for it.
+ virtual void *getJITStubForFunction(Function *F, MachineCodeEmitter &MCE);
+ };
+}
+
+#endif
--- /dev/null
+//===- SkeletonRegisterInfo.cpp - Skeleton Register Information -*- C++ -*-===//
+//
+// The LLVM Compiler Infrastructure
+//
+// This file was developed by the LLVM research group and is distributed under
+// the University of Illinois Open Source License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+//
+// This file contains the Skeleton implementation of the MRegisterInfo class.
+//
+//===----------------------------------------------------------------------===//
+
+#include "Skeleton.h"
+#include "SkeletonRegisterInfo.h"
+#include "llvm/Type.h"
+using namespace llvm;
+
+SkeletonRegisterInfo::SkeletonRegisterInfo()
+ : SkeletonGenRegisterInfo(Skeleton::ADJCALLSTACKDOWN,
+ Skeleton::ADJCALLSTACKUP) {}
+
+int SkeletonRegisterInfo::storeRegToStackSlot(MachineBasicBlock &MBB,
+ MachineBasicBlock::iterator MBBI,
+ unsigned SrcReg, int FrameIdx,
+ const TargetRegisterClass *RC) const {
+ abort();
+ return -1;
+}
+
+int SkeletonRegisterInfo::loadRegFromStackSlot(MachineBasicBlock &MBB,
+ MachineBasicBlock::iterator MBBI,
+ unsigned DestReg, int FrameIdx,
+ const TargetRegisterClass *RC) const {
+ abort();
+ return -1;
+}
+
+int SkeletonRegisterInfo::copyRegToReg(MachineBasicBlock &MBB,
+ MachineBasicBlock::iterator MBBI,
+ unsigned DestReg, unsigned SrcReg,
+ const TargetRegisterClass *RC) const {
+ abort();
+ return -1;
+}
+
+void SkeletonRegisterInfo::
+eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
+ MachineBasicBlock::iterator I) const {
+ abort();
+}
+
+void SkeletonRegisterInfo::eliminateFrameIndex(MachineFunction &MF,
+ MachineBasicBlock::iterator II) const {
+ abort();
+}
+
+void SkeletonRegisterInfo::
+processFunctionBeforeFrameFinalized(MachineFunction &MF) const {
+ abort();
+}
+
+void SkeletonRegisterInfo::emitPrologue(MachineFunction &MF) const {
+ abort();
+}
+
+void SkeletonRegisterInfo::emitEpilogue(MachineFunction &MF,
+ MachineBasicBlock &MBB) const {
+ abort();
+}
+
+
+#include "SkeletonGenRegisterInfo.inc"
+
+const TargetRegisterClass*
+SkeletonRegisterInfo::getRegClassForType(const Type* Ty) const {
+ switch (Ty->getTypeID()) {
+ case Type::LongTyID:
+ case Type::ULongTyID: assert(0 && "Long values can't fit in registers!");
+ default: assert(0 && "Invalid type to getClass!");
+ case Type::BoolTyID:
+ case Type::SByteTyID:
+ case Type::UByteTyID:
+ case Type::ShortTyID:
+ case Type::UShortTyID:
+ case Type::IntTyID:
+ case Type::UIntTyID:
+ case Type::PointerTyID: return &GPRCInstance;
+
+ case Type::FloatTyID:
+ case Type::DoubleTyID: return &FPRCInstance;
+ }
+}
+
--- /dev/null
+//===- SkeletonRegisterInfo.h - Skeleton Register Information Impl -*- C++ -*-==//
+//
+// The LLVM Compiler Infrastructure
+//
+// This file was developed by the LLVM research group and is distributed under
+// the University of Illinois Open Source License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+//
+// This file contains the Skeleton implementation of the MRegisterInfo class.
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef SKELETON_REGISTERINFO_H
+#define SKELETON_REGISTERINFO_H
+
+#include "llvm/Target/MRegisterInfo.h"
+#include "SkeletonGenRegisterInfo.h.inc"
+
+namespace llvm {
+ class Type;
+
+ struct SkeletonRegisterInfo : public SkeletonGenRegisterInfo {
+ SkeletonRegisterInfo();
+ const TargetRegisterClass* getRegClassForType(const Type* Ty) const;
+
+ // See MRegisterInfo.h for information on these methods.
+ int storeRegToStackSlot(MachineBasicBlock &MBB,
+ MachineBasicBlock::iterator MBBI,
+ unsigned SrcReg, int FrameIndex,
+ const TargetRegisterClass *RC) const;
+
+ int loadRegFromStackSlot(MachineBasicBlock &MBB,
+ MachineBasicBlock::iterator MBBI,
+ unsigned DestReg, int FrameIndex,
+ const TargetRegisterClass *RC) const;
+
+ int copyRegToReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI,
+ unsigned DestReg, unsigned SrcReg,
+ const TargetRegisterClass *RC) const;
+
+ void eliminateCallFramePseudoInstr(MachineFunction &MF,
+ MachineBasicBlock &MBB,
+ MachineBasicBlock::iterator I) const;
+
+ void eliminateFrameIndex(MachineFunction &MF,
+ MachineBasicBlock::iterator II) const;
+
+ void processFunctionBeforeFrameFinalized(MachineFunction &MF) const;
+
+ void emitPrologue(MachineFunction &MF) const;
+ void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const;
+ };
+} // end namespace llvm
+
+#endif
--- /dev/null
+//===-- SkeletonTargetMachine.cpp - Define TargetMachine for Skeleton -----===//
+//
+// The LLVM Compiler Infrastructure
+//
+// This file was developed by the LLVM research group and is distributed under
+// the University of Illinois Open Source License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+//
+//
+//===----------------------------------------------------------------------===//
+
+#include "SkeletonTargetMachine.h"
+#include "Skeleton.h"
+#include "llvm/Module.h"
+#include "llvm/PassManager.h"
+#include "llvm/Target/TargetOptions.h"
+#include "llvm/Target/TargetMachineRegistry.h"
+#include "llvm/CodeGen/MachineFunction.h"
+#include "llvm/CodeGen/Passes.h"
+using namespace llvm;
+
+namespace {
+ // Register the target.
+ RegisterTarget<SkeletonTargetMachine> X("skeleton",
+ " Target Skeleton (unusable)");
+}
+
+/// SkeletonTargetMachine ctor - Create an ILP32 architecture model
+///
+SkeletonTargetMachine::SkeletonTargetMachine(const Module &M,
+ IntrinsicLowering *IL)
+ : TargetMachine("Skeleton", IL, true, 4, 4, 4, 4, 4),
+ FrameInfo(TargetFrameInfo::StackGrowsDown, 8, -4), JITInfo(*this) {
+}
+
+/// addPassesToEmitAssembly - Add passes to the specified pass manager
+/// to implement a static compiler for this target.
+///
+bool SkeletonTargetMachine::addPassesToEmitAssembly(PassManager &PM,
+ std::ostream &Out) {
+ // <insert instruction selector passes here>
+ PM.add(createRegisterAllocator());
+ PM.add(createPrologEpilogCodeInserter());
+ // <insert assembly code output passes here>
+ PM.add(createMachineCodeDeleter());
+ return true; // change to `return false' when this actually works.
+}
+
+/// addPassesToJITCompile - Add passes to the specified pass manager to
+/// implement a fast dynamic compiler for this target.
+///
+void SkeletonJITInfo::addPassesToJITCompile(FunctionPassManager &PM) {
+ // <insert instruction selector passes here>
+ PM.add(createRegisterAllocator());
+ PM.add(createPrologEpilogCodeInserter());
+}
+
--- /dev/null
+//===-- SkeletonTargetMachine.h - TargetMachine for Skeleton ----*- C++ -*-===//
+//
+// The LLVM Compiler Infrastructure
+//
+// This file was developed by the LLVM research group and is distributed under
+// the University of Illinois Open Source License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+//
+// This file declares the Skeleton specific subclass of TargetMachine.
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef SKELETONTARGETMACHINE_H
+#define SKELETONTARGETMACHINE_H
+
+#include "llvm/Target/TargetMachine.h"
+#include "llvm/Target/TargetFrameInfo.h"
+#include "llvm/PassManager.h"
+#include "SkeletonInstrInfo.h"
+#include "SkeletonJITInfo.h"
+
+namespace llvm {
+ class IntrinsicLowering;
+
+ class SkeletonTargetMachine : public TargetMachine {
+ SkeletonInstrInfo InstrInfo;
+ TargetFrameInfo FrameInfo;
+ SkeletonJITInfo JITInfo;
+ public:
+ SkeletonTargetMachine(const Module &M, IntrinsicLowering *IL);
+
+ virtual const SkeletonInstrInfo *getInstrInfo() const { return &InstrInfo; }
+ virtual const TargetFrameInfo *getFrameInfo() const { return &FrameInfo; }
+ virtual const MRegisterInfo *getRegisterInfo() const {
+ return &InstrInfo.getRegisterInfo();
+ }
+ virtual TargetJITInfo *getJITInfo() {
+ return &JITInfo;
+ }
+
+ virtual bool addPassesToEmitMachineCode(FunctionPassManager &PM,
+ MachineCodeEmitter &MCE);
+
+ virtual bool addPassesToEmitAssembly(PassManager &PM, std::ostream &Out);
+ };
+
+} // end namespace llvm
+
+#endif
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