ARM: tegra: Enable IOMMU for display controllers on Tegra124

Add iommus properties to the device tree nodes for the two display
controllers found on Tegra124. This will allow the display controllers
to map physically non-contiguous buffers to I/O virtual contiguous
address spaces so that they can be used for scan-out.

Signed-off-by: Thierry Reding <treding@nvidia.com>

diff --git a/arch/arm/boot/dts/tegra124.dtsi b/arch/arm/boot/dts/tegra124.dtsi
index 5fcc6e704faaa03d8e783412cbb6ee6d20717198..a9f3a3e1afc40db63f0d2449a3f8fff8f0340b7a 100644 (file)
--- a/arch/arm/boot/dts/tegra124.dtsi
+++ b/arch/arm/boot/dts/tegra124.dtsi
@@ -1,5 +1,6 @@
 #include <dt-bindings/clock/tegra124-car.h>
 #include <dt-bindings/gpio/tegra-gpio.h>
+#include <dt-bindings/memory/tegra124-mc.h>
 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
 #include <dt-bindings/pinctrl/pinctrl-tegra-xusb.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
@@ -102,6 +103,8 @@
                        resets = <&tegra_car 27>;
                        reset-names = "dc";
 
+                       iommus = <&mc TEGRA_SWGROUP_DC>;
+
                        nvidia,head = <0>;
                };
 
@@ -115,6 +118,8 @@
                        resets = <&tegra_car 26>;
                        reset-names = "dc";
 
+                       iommus = <&mc TEGRA_SWGROUP_DCB>;
+
                        nvidia,head = <1>;
                };