Expand the repertoire of the forms we can print and encode.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11537 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/X86/Printer.cpp b/lib/Target/X86/Printer.cpp
index 1b70773b533b7b24756c898e9050f2fc62ff4594..be1f34d3bbe79b60fd31b69a1e295fab899c0d6a 100644 (file)
--- a/lib/Target/X86/Printer.cpp
+++ b/lib/Target/X86/Printer.cpp
@@ -699,17 +699,16 @@ void Printer::printMachineInstruction(const MachineInstr *MI) {
     //
     assert(MI->getOperand(0).isRegister() &&
            (MI->getNumOperands() == 1+4 && isMem(MI, 1)) || 
-           (MI->getNumOperands() == 2+4 && MI->getOperand(1).isRegister() && 
-            isMem(MI, 2))
+(MI->getNumOperands() == 2+4 && MI->getOperand(5).isImmediate() && isMem(MI, 1))
            && "Bad format for MRMSrcMem!");
-    if (MI->getNumOperands() == 2+4 &&
-        MI->getOperand(0).getReg() != MI->getOperand(1).getReg())
-      O << "**";
-
     O << TII.getName(MI->getOpcode()) << " ";
     printOp(MI->getOperand(0));
     O << ", " << sizePtr(Desc) << " ";
-    printMemReference(MI, MI->getNumOperands()-4);
+    printMemReference(MI, 1);
+    if (MI->getNumOperands() == 2+4) {
+      O << ", ";
+      printOp(MI->getOperand(5));
+    }
     O << "\n";
     return;
   }

diff --git a/lib/Target/X86/X86AsmPrinter.cpp b/lib/Target/X86/X86AsmPrinter.cpp
index 1b70773b533b7b24756c898e9050f2fc62ff4594..be1f34d3bbe79b60fd31b69a1e295fab899c0d6a 100644 (file)
--- a/lib/Target/X86/X86AsmPrinter.cpp
+++ b/lib/Target/X86/X86AsmPrinter.cpp
@@ -699,17 +699,16 @@ void Printer::printMachineInstruction(const MachineInstr *MI) {
     //
     assert(MI->getOperand(0).isRegister() &&
            (MI->getNumOperands() == 1+4 && isMem(MI, 1)) || 
-           (MI->getNumOperands() == 2+4 && MI->getOperand(1).isRegister() && 
-            isMem(MI, 2))
+(MI->getNumOperands() == 2+4 && MI->getOperand(5).isImmediate() && isMem(MI, 1))
            && "Bad format for MRMSrcMem!");
-    if (MI->getNumOperands() == 2+4 &&
-        MI->getOperand(0).getReg() != MI->getOperand(1).getReg())
-      O << "**";
-
     O << TII.getName(MI->getOpcode()) << " ";
     printOp(MI->getOperand(0));
     O << ", " << sizePtr(Desc) << " ";
-    printMemReference(MI, MI->getNumOperands()-4);
+    printMemReference(MI, 1);
+    if (MI->getNumOperands() == 2+4) {
+      O << ", ";
+      printOp(MI->getOperand(5));
+    }
     O << "\n";
     return;
   }

diff --git a/lib/Target/X86/X86CodeEmitter.cpp b/lib/Target/X86/X86CodeEmitter.cpp
index a28d0ee86db8ca2a21f85a13c3b8f68fa325a1b9..f9de6febb7f12615ee564ae4b2577938aaa0d77e 100644 (file)
--- a/lib/Target/X86/X86CodeEmitter.cpp
+++ b/lib/Target/X86/X86CodeEmitter.cpp
@@ -574,8 +574,9 @@ void Emitter::emitInstruction(MachineInstr &MI) {
 
   case X86II::MRMSrcMem:
     MCE.emitByte(BaseOpcode);
-    emitMemModRMByte(MI, MI.getNumOperands()-4,
-                     getX86RegNum(MI.getOperand(0).getReg()));
+    emitMemModRMByte(MI, 1, getX86RegNum(MI.getOperand(0).getReg()));
+    if (MI.getNumOperands() == 2+4)
+      emitConstant(MI.getOperand(5).getImmedValue(), sizeOfPtr(Desc));
     break;
 
   case X86II::MRMS0r: case X86II::MRMS1r: