powerpc: 83xx: pci: Remove need for get_immrbase from mpc83xx_add_bridge.
authorJohn Rigby <jrigby@freescale.com>
Tue, 7 Oct 2008 19:00:18 +0000 (13:00 -0600)
committerKumar Gala <galak@kernel.crashing.org>
Mon, 13 Oct 2008 16:09:58 +0000 (11:09 -0500)
Modify mpc83xx_add_bridge to get config space register base address from
the device tree instead of immr + hardcoded offset.

83xx pci nodes have this change:
    register properties now contain two address length tuples:
First is the pci bridge register base, this has always been there.
Second is the config base, this is new.

This is documented in dts-bindings/fsl/83xx-512x-pci.txt

The changes accomplish these things:
    mpc83xx_add_bridge no longer needs to call get_immrbase
    it uses hard coded addresses if the second register value is missing

Signed-off-by: John Rigby <jrigby@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
18 files changed:
Documentation/powerpc/dts-bindings/fsl/83xx-512x-pci.txt [new file with mode: 0644]
arch/powerpc/boot/dts/mpc8313erdb.dts
arch/powerpc/boot/dts/mpc8315erdb.dts
arch/powerpc/boot/dts/mpc832x_mds.dts
arch/powerpc/boot/dts/mpc832x_rdb.dts
arch/powerpc/boot/dts/mpc8349emitx.dts
arch/powerpc/boot/dts/mpc8349emitxgp.dts
arch/powerpc/boot/dts/mpc834x_mds.dts
arch/powerpc/boot/dts/mpc836x_mds.dts
arch/powerpc/boot/dts/mpc836x_rdk.dts
arch/powerpc/boot/dts/mpc8377_mds.dts
arch/powerpc/boot/dts/mpc8377_rdb.dts
arch/powerpc/boot/dts/mpc8378_mds.dts
arch/powerpc/boot/dts/mpc8378_rdb.dts
arch/powerpc/boot/dts/mpc8379_mds.dts
arch/powerpc/boot/dts/mpc8379_rdb.dts
arch/powerpc/boot/dts/sbc8349.dts
arch/powerpc/sysdev/fsl_pci.c

diff --git a/Documentation/powerpc/dts-bindings/fsl/83xx-512x-pci.txt b/Documentation/powerpc/dts-bindings/fsl/83xx-512x-pci.txt
new file mode 100644 (file)
index 0000000..35a4653
--- /dev/null
@@ -0,0 +1,40 @@
+* Freescale 83xx and 512x PCI bridges
+
+Freescale 83xx and 512x SOCs include the same pci bridge core.
+
+83xx/512x specific notes:
+- reg: should contain two address length tuples
+    The first is for the internal pci bridge registers
+    The second is for the pci config space access registers
+
+Example (MPC8313ERDB)
+       pci0: pci@e0008500 {
+               cell-index = <1>;
+               interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
+               interrupt-map = <
+                               /* IDSEL 0x0E -mini PCI */
+                                0x7000 0x0 0x0 0x1 &ipic 18 0x8
+                                0x7000 0x0 0x0 0x2 &ipic 18 0x8
+                                0x7000 0x0 0x0 0x3 &ipic 18 0x8
+                                0x7000 0x0 0x0 0x4 &ipic 18 0x8
+
+                               /* IDSEL 0x0F - PCI slot */
+                                0x7800 0x0 0x0 0x1 &ipic 17 0x8
+                                0x7800 0x0 0x0 0x2 &ipic 18 0x8
+                                0x7800 0x0 0x0 0x3 &ipic 17 0x8
+                                0x7800 0x0 0x0 0x4 &ipic 18 0x8>;
+               interrupt-parent = <&ipic>;
+               interrupts = <66 0x8>;
+               bus-range = <0x0 0x0>;
+               ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
+                         0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
+                         0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>;
+               clock-frequency = <66666666>;
+               #interrupt-cells = <1>;
+               #size-cells = <2>;
+               #address-cells = <3>;
+               reg = <0xe0008500 0x100         /* internal registers */
+                      0xe0008300 0x8>;         /* config space access registers */
+               compatible = "fsl,mpc8349-pci";
+               device_type = "pci";
+       };
index 539085591e0418263ab613f610a26cd671c741dc..747f27676332f1d1fc243da4f36ad19faa23e328 100644 (file)
                        #interrupt-cells = <1>;
                        #size-cells = <2>;
                        #address-cells = <3>;
-                       reg = <0xe0008500 0x100>;
+                       reg = <0xe0008500 0x100         /* internal registers */
+                              0xe0008300 0x8>;         /* config space access registers */
                        compatible = "fsl,mpc8349-pci";
                        device_type = "pci";
                };
index 94c9b4107a1d8f590baa4c6e49dd850a921509c1..7449e54c1a908d46e780aa5815c4ef83b71551bb 100644 (file)
                #interrupt-cells = <1>;
                #size-cells = <2>;
                #address-cells = <3>;
-               reg = <0xe0008500 0x100>;
+               reg = <0xe0008500 0x100         /* internal registers */
+                      0xe0008300 0x8>;         /* config space access registers */
                compatible = "fsl,mpc8349-pci";
                device_type = "pci";
        };
index 015808ae102637a1a27f1c20ab5aa8ff07c49333..e4cc1768f24165b56446ce5b06a0d4d422f64bbf 100644 (file)
                #interrupt-cells = <1>;
                #size-cells = <2>;
                #address-cells = <3>;
-               reg = <0xe0008500 0x100>;
+               reg = <0xe0008500 0x100         /* internal registers */
+                      0xe0008300 0x8>;         /* config space access registers */
                compatible = "fsl,mpc8349-pci";
                device_type = "pci";
        };
index b5b0ec2eb88f16a9e72acb311ed13ea741f5d9cc..226ff066652ba36e8f5e5c229b643a68c03da49d 100644 (file)
                #interrupt-cells = <1>;
                #size-cells = <2>;
                #address-cells = <3>;
-               reg = <0xe0008500 0x100>;
+               reg = <0xe0008500 0x100         /* internal registers */
+                      0xe0008300 0x8>;         /* config space access registers */
                compatible = "fsl,mpc8349-pci";
                device_type = "pci";
        };
index 1327a61d0538d3dc83d7d0f5600c0d3ebbacb11a..5cedf373a1d802e39aba5c21e232b49db2ed71a6 100644 (file)
                #interrupt-cells = <1>;
                #size-cells = <2>;
                #address-cells = <3>;
-               reg = <0xe0008500 0x100>;
+               reg = <0xe0008500 0x100         /* internal registers */
+                      0xe0008300 0x8>;         /* config space access registers */
                compatible = "fsl,mpc8349-pci";
                device_type = "pci";
        };
                #interrupt-cells = <1>;
                #size-cells = <2>;
                #address-cells = <3>;
-               reg = <0xe0008600 0x100>;
+               reg = <0xe0008600 0x100         /* internal registers */
+                      0xe0008380 0x8>;         /* config space access registers */
                compatible = "fsl,mpc8349-pci";
                device_type = "pci";
        };
index f70d3a0a6eb913ec55b70fd8de7eb130f8dabec8..81ae1d3e9440ad06be3e14eeb9cb10ce544ae659 100644 (file)
                #interrupt-cells = <1>;
                #size-cells = <2>;
                #address-cells = <3>;
-               reg = <0xe0008600 0x100>;
+               reg = <0xe0008600 0x100         /* internal registers */
+                      0xe0008380 0x8>;         /* config space access registers */
                compatible = "fsl,mpc8349-pci";
                device_type = "pci";
        };
index e29739eee35ef6babe3287505e880ef16e2385d4..04bfde3ea605b2ec64cc528c0e64341e89ff8c33 100644 (file)
                #interrupt-cells = <1>;
                #size-cells = <2>;
                #address-cells = <3>;
-               reg = <0xe0008500 0x100>;
+               reg = <0xe0008500 0x100         /* internal registers */
+                      0xe0008300 0x8>;         /* config space access registers */
                compatible = "fsl,mpc8349-pci";
                device_type = "pci";
        };
                #interrupt-cells = <1>;
                #size-cells = <2>;
                #address-cells = <3>;
-               reg = <0xe0008600 0x100>;
+               reg = <0xe0008600 0x100         /* internal registers */
+                      0xe0008380 0x8>;         /* config space access registers */
                compatible = "fsl,mpc8349-pci";
                device_type = "pci";
        };
index 49aec71916e5285437e22e818c8c41064f88b268..66a12d2631fbd4e39b93e3d6c351ed820703d6c9 100644 (file)
                #interrupt-cells = <1>;
                #size-cells = <2>;
                #address-cells = <3>;
-               reg = <0xe0008500 0x100>;
+               reg = <0xe0008500 0x100         /* internal registers */
+                      0xe0008300 0x8>;         /* config space access registers */
                compatible = "fsl,mpc8349-pci";
                device_type = "pci";
        };
index 69c9bd2acd822a20540a4aa987c2e13bfcc8882e..f747747e5318e78918a52f06bc438ddaff5c1afe 100644 (file)
                #interrupt-cells = <1>;
                device_type = "pci";
                compatible = "fsl,mpc8360-pci", "fsl,mpc8349-pci";
-               reg = <0xe0008500 0x100>;
+               reg = <0xe0008500 0x100         /* internal registers */
+                      0xe0008300 0x8>;         /* config space access registers */
                ranges = <0x02000000 0 0x90000000 0x90000000 0 0x10000000
                          0x42000000 0 0x80000000 0x80000000 0 0x10000000
                          0x01000000 0 0xe0300000 0xe0300000 0 0x00100000>;
index 78f0f1124ffb011bc382abc792a00b4675f18508..87314c78b47bbd5b33516779c26c20fec718b45e 100644 (file)
                #interrupt-cells = <1>;
                #size-cells = <2>;
                #address-cells = <3>;
-               reg = <0xe0008500 0x100>;
+               reg = <0xe0008500 0x100         /* internal registers */
+                      0xe0008300 0x8>;         /* config space access registers */
                compatible = "fsl,mpc8349-pci";
                device_type = "pci";
        };
index d46327e8cb676201cea3af4add067ed429653e4c..53191ba67aaa3a1d2493fb8a251b0f437efff167 100644 (file)
                #interrupt-cells = <1>;
                #size-cells = <2>;
                #address-cells = <3>;
-               reg = <0xe0008500 0x100>;
+               reg = <0xe0008500 0x100         /* internal registers */
+                      0xe0008300 0x8>;         /* config space access registers */
                compatible = "fsl,mpc8349-pci";
                device_type = "pci";
        };
index c44f30f2f08648c2a1cc303fc2f767d383867bed..02941919598fac2516049e26c6206767b2582316 100644 (file)
                #interrupt-cells = <1>;
                #size-cells = <2>;
                #address-cells = <3>;
-               reg = <0xe0008500 0x100>;
+               reg = <0xe0008500 0x100         /* internal registers */
+                      0xe0008300 0x8>;         /* config space access registers */
                compatible = "fsl,mpc8349-pci";
                device_type = "pci";
        };
index b3e3bd7d550d154b2d91bbb08811aa755cc56514..4a09153d160c90967b5b27a0bcfe52cc49561251 100644 (file)
                #interrupt-cells = <1>;
                #size-cells = <2>;
                #address-cells = <3>;
-               reg = <0xe0008500 0x100>;
+               reg = <0xe0008500 0x100         /* internal registers */
+                      0xe0008300 0x8>;         /* config space access registers */
                compatible = "fsl,mpc8349-pci";
                device_type = "pci";
        };
index 653ed47c9a37f60e2b4ec0e421119137e9f077fd..13a231144dcc62cf9fd0a9defd5cbdbb5e42be4a 100644 (file)
                #interrupt-cells = <1>;
                #size-cells = <2>;
                #address-cells = <3>;
-               reg = <0xe0008500 0x100>;
+               reg = <0xe0008500 0x100         /* internal registers */
+                      0xe0008300 0x8>;         /* config space access registers */
                compatible = "fsl,mpc8349-pci";
                device_type = "pci";
        };
index 123c8df6f4f04552637733d795955a60c59aaf26..bbd884ac9dc0e3f84a487f2edb6277416b008cd8 100644 (file)
                #interrupt-cells = <1>;
                #size-cells = <2>;
                #address-cells = <3>;
-               reg = <0xe0008500 0x100>;
+               reg = <0xe0008500 0x100         /* internal registers */
+                      0xe0008300 0x8>;         /* config space access registers */
                compatible = "fsl,mpc8349-pci";
                device_type = "pci";
        };
index c7f411f7a9a2b0d59d2ae23f77904468d1ffa556..0f941f310e444ae2d209f8195b7f71525cb07ad4 100644 (file)
                #interrupt-cells = <1>;
                #size-cells = <2>;
                #address-cells = <3>;
-               reg = <0xe0008500 0x100>;
+               reg = <0xe0008500 0x100         /* internal registers */
+                      0xe0008300 0x8>;         /* config space access registers */
                compatible = "fsl,mpc8349-pci";
                device_type = "pci";
        };
index 61e6d77efa4fcec7d17fe31d6b5763786ba58319..a3f4abadbadef7749fbab7f3003bdbba329a7a88 100644 (file)
@@ -1,7 +1,7 @@
 /*
- * MPC85xx/86xx PCI/PCIE support routing.
+ * MPC83xx/85xx/86xx PCI/PCIE support routing.
  *
- * Copyright 2007 Freescale Semiconductor, Inc
+ * Copyright 2007,2008 Freescale Semiconductor, Inc
  *
  * Initial author: Xianghua Xiao <x.xiao@freescale.com>
  * Recode: ZHANG WEI <wei.zhang@freescale.com>
@@ -256,15 +256,42 @@ int __init mpc83xx_add_bridge(struct device_node *dev)
 {
        int len;
        struct pci_controller *hose;
-       struct resource rsrc;
+       struct resource rsrc_reg;
+       struct resource rsrc_cfg;
        const int *bus_range;
-       int primary = 1, has_address = 0;
-       phys_addr_t immr = get_immrbase();
+       int primary;
 
        pr_debug("Adding PCI host bridge %s\n", dev->full_name);
 
        /* Fetch host bridge registers address */
-       has_address = (of_address_to_resource(dev, 0, &rsrc) == 0);
+       if (of_address_to_resource(dev, 0, &rsrc_reg)) {
+               printk(KERN_WARNING "Can't get pci register base!\n");
+               return -ENOMEM;
+       }
+
+       memset(&rsrc_cfg, 0, sizeof(rsrc_cfg));
+
+       if (of_address_to_resource(dev, 1, &rsrc_cfg)) {
+               printk(KERN_WARNING
+                       "No pci config register base in dev tree, "
+                       "using default\n");
+               /*
+                * MPC83xx supports up to two host controllers
+                *      one at 0x8500 has config space registers at 0x8300
+                *      one at 0x8600 has config space registers at 0x8380
+                */
+               if ((rsrc_reg.start & 0xfffff) == 0x8500)
+                       rsrc_cfg.start = (rsrc_reg.start & 0xfff00000) + 0x8300;
+               else if ((rsrc_reg.start & 0xfffff) == 0x8600)
+                       rsrc_cfg.start = (rsrc_reg.start & 0xfff00000) + 0x8380;
+       }
+       /*
+        * Controller at offset 0x8500 is primary
+        */
+       if ((rsrc_reg.start & 0xfffff) == 0x8500)
+               primary = 1;
+       else
+               primary = 0;
 
        /* Get bus range if any */
        bus_range = of_get_property(dev, "bus-range", &len);
@@ -281,22 +308,11 @@ int __init mpc83xx_add_bridge(struct device_node *dev)
        hose->first_busno = bus_range ? bus_range[0] : 0;
        hose->last_busno = bus_range ? bus_range[1] : 0xff;
 
-       /* MPC83xx supports up to two host controllers one at 0x8500 from immrbar
-        * the other at 0x8600, we consider the 0x8500 the primary controller
-        */
-       /* PCI 1 */
-       if ((rsrc.start & 0xfffff) == 0x8500) {
-               setup_indirect_pci(hose, immr + 0x8300, immr + 0x8304, 0);
-       }
-       /* PCI 2 */
-       if ((rsrc.start & 0xfffff) == 0x8600) {
-               setup_indirect_pci(hose, immr + 0x8380, immr + 0x8384, 0);
-               primary = 0;
-       }
+       setup_indirect_pci(hose, rsrc_cfg.start, rsrc_cfg.start + 4, 0);
 
        printk(KERN_INFO "Found MPC83xx PCI host bridge at 0x%016llx. "
               "Firmware bus number: %d->%d\n",
-              (unsigned long long)rsrc.start, hose->first_busno,
+              (unsigned long long)rsrc_reg.start, hose->first_busno,
               hose->last_busno);
 
        pr_debug(" ->Hose at 0x%p, cfg_addr=0x%p,cfg_data=0x%p\n",