#include "usbdev_rk.h"\r
#include "dwc_otg_regs.h" \r
\r
-#ifdef CONFIG_ARCH_RK30\r
+#if defined(CONFIG_ARCH_RK30) || defined(CONFIG_ARCH_RK3188)\r
\r
#define GRF_REG_BASE RK30_GRF_BASE \r
#define USBOTG_SIZE RK30_USBOTG20_SIZE\r
-#ifdef CONFIG_ARCH_RK3066B\r
+#if defined(CONFIG_ARCH_RK3066B) || defined(CONFIG_ARCH_RK3188)\r
#define USBGRF_SOC_STATUS0 (GRF_REG_BASE+0xac)\r
#define USBGRF_UOC0_CON2 (GRF_REG_BASE+0x114)\r
#define USBGRF_UOC0_CON3 (GRF_REG_BASE+0x118)\r
#define USBGRF_UOC1_CON2 (GRF_REG_BASE+0x124)\r
#define USBGRF_UOC1_CON3 (GRF_REG_BASE+0x128)\r
\r
+#if defined(CONFIG_SOC_RK3066B) || defined(CONFIG_SOC_RK3108) \r
#define RK3066B_HOST_DRV_VBUS RK30_PIN0_PD7\r
#define RK3066B_OTG_DRV_VBUS RK30_PIN0_PD6\r
+#elif defined(CONFIG_SOC_RK3168) || defined(CONFIG_ARCH_RK3188) \r
+#define RK3066B_HOST_DRV_VBUS RK30_PIN0_PC0\r
+#define RK3066B_OTG_DRV_VBUS RK30_PIN3_PD5\r
+#endif\r
\r
#else\r
#define USBGRF_SOC_STATUS0 (GRF_REG_BASE+0x15c)\r
{\r
#ifndef CONFIG_USB20_HOST\r
// close USB 2.0 HOST phy and clock\r
-#ifdef CONFIG_ARCH_RK3066B\r
+#if defined(CONFIG_ARCH_RK3066B) || defined(CONFIG_ARCH_RK3188)\r
unsigned int * otg_phy_con1 = (unsigned int*)(USBGRF_UOC1_CON2);\r
unsigned int * otg_phy_con2 = (unsigned int*)(USBGRF_UOC1_CON3);\r
*otg_phy_con1 = (0x01<<2)|((0x01<<2)<<16); //enable soft control\r
// usb phy config init\r
\r
// other haredware init\r
-#ifdef CONFIG_ARCH_RK3066B\r
+#if defined(CONFIG_ARCH_RK3066B) || defined(CONFIG_ARCH_RK3188)\r
//GPIO init\r
gpio_request(RK3066B_OTG_DRV_VBUS, NULL);\r
gpio_direction_output(RK3066B_OTG_DRV_VBUS, GPIO_LOW);\r
\r
void usb20otg_phy_suspend(void* pdata, int suspend)\r
{\r
-#ifdef CONFIG_ARCH_RK3066B\r
+#if defined(CONFIG_ARCH_RK3066B) || defined(CONFIG_ARCH_RK3188)\r
struct dwc_otg_platform_data *usbpdata=pdata;\r
unsigned int * otg_phy_con1 = (unsigned int*)(USBGRF_UOC0_CON2);\r
unsigned int * otg_phy_con2 = (unsigned int*)(USBGRF_UOC0_CON3);\r
unsigned int usbgrf_status = *(unsigned int*)(USBGRF_SOC_STATUS0);\r
switch(id)\r
{\r
-#ifdef CONFIG_ARCH_RK3066B\r
+#if defined(CONFIG_ARCH_RK3066B) || defined(CONFIG_ARCH_RK3188)\r
case USB_STATUS_BVABLID:\r
// bvalid in grf\r
ret = (usbgrf_status &(1<<10));\r
return ret;\r
}\r
\r
-#ifdef CONFIG_ARCH_RK3066B\r
+#if defined(CONFIG_ARCH_RK3066B) || defined(CONFIG_ARCH_RK3188)\r
void usb20otg_power_enable(int enable)\r
{ \r
unsigned int usbgrf_status = *(unsigned int*)(USBGRF_SOC_STATUS0);\r
.clock_init=usb20otg_clock_init,\r
.clock_enable=usb20otg_clock_enable,\r
.get_status=usb20otg_get_status,\r
-#ifdef CONFIG_ARCH_RK3066B\r
+#if defined(CONFIG_ARCH_RK3066B) || defined(CONFIG_ARCH_RK3188)\r
.power_enable=usb20otg_power_enable,\r
#endif \r
};\r
// usb phy config init\r
\r
// other haredware init\r
-#ifdef CONFIG_ARCH_RK3066B\r
+#if defined(CONFIG_ARCH_RK3066B) || defined(CONFIG_ARCH_RK3188)\r
gpio_request(RK3066B_HOST_DRV_VBUS, NULL);\r
gpio_direction_output(RK3066B_HOST_DRV_VBUS, GPIO_HIGH);\r
#else\r
}\r
void usb20host_phy_suspend(void* pdata, int suspend)\r
{ \r
-#ifdef CONFIG_ARCH_RK3066B\r
+#if defined(CONFIG_ARCH_RK3066B) || defined(CONFIG_ARCH_RK3188)\r
struct dwc_otg_platform_data *usbpdata=pdata;\r
unsigned int * otg_phy_con1 = (unsigned int*)(USBGRF_UOC1_CON2);\r
unsigned int * otg_phy_con2 = (unsigned int*)(USBGRF_UOC1_CON3);\r
unsigned int usbgrf_status = *(unsigned int*)(USBGRF_SOC_STATUS0);\r
switch(id)\r
{\r
-#ifdef CONFIG_ARCH_RK3066B\r
+#if defined(CONFIG_ARCH_RK3066B) || defined(CONFIG_ARCH_RK3188)\r
case USB_STATUS_BVABLID:\r
// bvalid in grf\r
ret = (usbgrf_status &(1<<17));\r
return ret;\r
}\r
\r
-#ifdef CONFIG_ARCH_RK3066B\r
+#if defined(CONFIG_ARCH_RK3066B) || defined(CONFIG_ARCH_RK3188)\r
void usb20host_power_enable(int enable)\r
{ \r
\r
.clock_init=usb20host_clock_init,\r
.clock_enable=usb20host_clock_enable,\r
.get_status=usb20host_get_status,\r
-#ifdef CONFIG_ARCH_RK3066B\r
+#if defined(CONFIG_ARCH_RK3066B) || defined(CONFIG_ARCH_RK3188)\r
.power_enable=usb20host_power_enable,\r
#endif \r
};\r