fix long lines.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46355 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
index 93de4f0f75dd39d9e183b13426e9a0fa0ebde4e9..4b88f7884f5d8287e2c303520b1d92835395c8e6 100644 (file)
--- a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
+++ b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
@@ -57,7 +57,7 @@ ViewSchedDAGs("view-sched-dags", cl::Hidden,
           cl::desc("Pop up a window to show sched dags as they are processed"));
 static cl::opt<bool>
 ViewSUnitDAGs("view-sunit-dags", cl::Hidden,
-          cl::desc("Pop up a window to show SUnit dags after they are processed"));
+      cl::desc("Pop up a window to show SUnit dags after they are processed"));
 #else
 static const bool ViewISelDAGs = 0, ViewSchedDAGs = 0, ViewSUnitDAGs = 0;
 #endif
@@ -79,7 +79,8 @@ namespace {
           RegisterPassParser<RegisterScheduler> >
   ISHeuristic("pre-RA-sched",
               cl::init(&createDefaultScheduler),
-              cl::desc("Instruction schedulers available (before register allocation):"));
+              cl::desc("Instruction schedulers available (before register"
+                       " allocation):"));
 
   static RegisterScheduler
   defaultListDAGScheduler("default", "  Best scheduler for the target",