[ARM] tegra: add FIQ support
authorIliyan Malchev <malchev@google.com>
Wed, 26 May 2010 21:21:21 +0000 (14:21 -0700)
committerColin Cross <ccross@android.com>
Wed, 6 Oct 2010 23:26:58 +0000 (16:26 -0700)
Signed-off-by: Iliyan Malchev <malchev@google.com>
arch/arm/Kconfig
arch/arm/mach-tegra/Makefile
arch/arm/mach-tegra/fiq.c [new file with mode: 0644]
arch/arm/mach-tegra/include/mach/fiq.h [new file with mode: 0644]
arch/arm/mach-tegra/include/mach/irqs.h

index 968c7c812454a42e7deacfb6d472116e4066b10b..f33645e2336dfb3e250200be311e209c9625fd45 100644 (file)
@@ -578,6 +578,7 @@ config ARCH_TEGRA
        select ARCH_HAS_BARRIERS if CACHE_L2X0
        select ARCH_HAS_CPUFREQ
        select ARCH_PROVIDES_UDELAY
+       select FIQ
        help
          This enables support for NVIDIA Tegra based systems (Tegra APX,
          Tegra 6xx and Tegra 2 series).
index 6b4a94bee5661fac71b08784648c700f5e58156d..b6baa5664c4abab6445bc27f785bebb7ce7924e8 100644 (file)
@@ -10,6 +10,8 @@ obj-y                                   += delay.o
 obj-y                                   += powergate.o
 obj-y                                  += suspend.o
 obj-y                                  += fuse.o
+obj-$(CONFIG_FIQ)                       += fiq.o
+
 obj-$(CONFIG_ARCH_TEGRA_2x_SOC)         += clock.o
 obj-$(CONFIG_ARCH_TEGRA_2x_SOC)         += tegra2_clocks.o
 obj-$(CONFIG_ARCH_TEGRA_2x_SOC)         += tegra2_dvfs.o
diff --git a/arch/arm/mach-tegra/fiq.c b/arch/arm/mach-tegra/fiq.c
new file mode 100644 (file)
index 0000000..81f573b
--- /dev/null
@@ -0,0 +1,53 @@
+/*
+ * Copyright (C) 2010 Google, Inc.
+ *
+ * Author:
+ *     Brian Swetland <swetland@google.com>
+ *     Iliyan Malchev <malchev@google.com>
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+#include <linux/io.h>
+#include <linux/slab.h>
+
+#include <asm/hardware/gic.h>
+
+#include <mach/iomap.h>
+#include <mach/fiq.h>
+#include <mach/legacy_irq.h>
+
+#include "board.h"
+
+void tegra_fiq_enable(int irq)
+{
+       void __iomem *base = IO_ADDRESS(TEGRA_ARM_PERIF_BASE + 0x100);
+       /* enable FIQ */
+       u32 val = readl(base + GIC_CPU_CTRL);
+       val &= ~8; /* pass FIQs through */
+       val |= 2; /* enableNS */
+       writel(val, base + GIC_CPU_CTRL);
+       tegra_legacy_unmask_irq(irq);
+}
+
+void tegra_fiq_disable(int irq)
+{
+       tegra_legacy_mask_irq(irq);
+}
+
+void tegra_fiq_select(int irq, int on)
+{
+       tegra_legacy_select_fiq(irq, !!on);
+}
diff --git a/arch/arm/mach-tegra/include/mach/fiq.h b/arch/arm/mach-tegra/include/mach/fiq.h
new file mode 100644 (file)
index 0000000..b538629
--- /dev/null
@@ -0,0 +1,32 @@
+/*
+ * Copyright (C) 2010 Google, Inc.
+ *
+ * Author:
+ *     Iliyan Malchev <malchev@google.com>
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#ifndef __ASM_ARCH_TEGRA_FIQ_H
+#define __ASM_ARCH_TEGRA_FIQ_H
+
+/* change an interrupt to be an FIQ instead of an IRQ */
+void tegra_fiq_select(int n, int on);
+
+/* enable/disable an interrupt that is an FIQ (safe from FIQ context?) */
+void tegra_fiq_enable(int n);
+void tegra_fiq_disable(int n);
+
+/* install an FIQ handler */
+int tegra_fiq_set_handler(void (*func)(void *data, void *regs, void *svc_sp),
+               void *data);
+
+#endif
index 73265af4dda3a607f6af93c8c844a9d0b262b10d..9c2da0ec77596870d16c0cf8a34d0c1101a32202 100644 (file)
 
 #define INT_GPIO_NR                    (28 * 8)
 
+#define FIQ_START                      INT_GIC_BASE
+
 #define TEGRA_NR_IRQS                  (INT_GPIO_BASE + INT_GPIO_NR)
 
 #define INT_BOARD_BASE                 TEGRA_NR_IRQS