#include <linux/mv643xx_eth.h>
#include <linux/mv643xx_i2c.h>
#include <linux/ata_platform.h>
+#include <linux/serial_8250.h>
#include <linux/spi/orion_spi.h>
#include <linux/gpio.h>
#include <asm/page.h>
static struct platform_device dove_uart0 = {
.name = "serial8250",
- .id = 0,
+ .id = PLAT8250_DEV_PLATFORM,
.dev = {
.platform_data = dove_uart0_data,
},
static struct platform_device dove_uart1 = {
.name = "serial8250",
- .id = 1,
+ .id = PLAT8250_DEV_PLATFORM1,
.dev = {
.platform_data = dove_uart1_data,
},
static struct platform_device dove_uart2 = {
.name = "serial8250",
- .id = 2,
+ .id = PLAT8250_DEV_PLATFORM2,
.dev = {
.platform_data = dove_uart2_data,
},
.phy_version = EHCI_PHY_NA,
};
-static u64 ehci_dmamask = 0xffffffffUL;
+static u64 ehci_dmamask = DMA_BIT_MASK(32);
/*****************************************************************************
static struct resource kirkwood_ehci_resources[] = {
{
.start = USB_PHYS_BASE,
- .end = USB_PHYS_BASE + 0x0fff,
+ .end = USB_PHYS_BASE + SZ_4K - 1,
.flags = IORESOURCE_MEM,
}, {
.start = IRQ_KIRKWOOD_USB,
.id = 0,
.dev = {
.dma_mask = &ehci_dmamask,
- .coherent_dma_mask = 0xffffffff,
+ .coherent_dma_mask = DMA_BIT_MASK(32),
.platform_data = &kirkwood_ehci_data,
},
.resource = kirkwood_ehci_resources,
{
.name = "ge00 base",
.start = GE00_PHYS_BASE + 0x2000,
- .end = GE00_PHYS_BASE + 0x3fff,
+ .end = GE00_PHYS_BASE + SZ_16K - 1,
.flags = IORESOURCE_MEM,
}, {
.name = "ge00 err irq",
.num_resources = 1,
.resource = kirkwood_ge00_resources,
.dev = {
- .coherent_dma_mask = 0xffffffff,
+ .coherent_dma_mask = DMA_BIT_MASK(32),
},
};
{
.name = "ge01 base",
.start = GE01_PHYS_BASE + 0x2000,
- .end = GE01_PHYS_BASE + 0x3fff,
+ .end = GE01_PHYS_BASE + SZ_16K - 1,
.flags = IORESOURCE_MEM,
}, {
.name = "ge01 err irq",
.num_resources = 1,
.resource = kirkwood_ge01_resources,
.dev = {
- .coherent_dma_mask = 0xffffffff,
+ .coherent_dma_mask = DMA_BIT_MASK(32),
},
};
.name = "sata_mv",
.id = 0,
.dev = {
- .coherent_dma_mask = 0xffffffff,
+ .coherent_dma_mask = DMA_BIT_MASK(32),
},
.num_resources = ARRAY_SIZE(kirkwood_sata_resources),
.resource = kirkwood_sata_resources,
},
};
-static u64 mvsdio_dmamask = 0xffffffffUL;
+static u64 mvsdio_dmamask = DMA_BIT_MASK(32);
static struct platform_device kirkwood_sdio = {
.name = "mvsdio",
.id = -1,
.dev = {
.dma_mask = &mvsdio_dmamask,
- .coherent_dma_mask = 0xffffffff,
+ .coherent_dma_mask = DMA_BIT_MASK(32),
},
.num_resources = ARRAY_SIZE(mvsdio_resources),
.resource = mvsdio_resources,
static struct platform_device kirkwood_uart0 = {
.name = "serial8250",
- .id = 0,
+ .id = PLAT8250_DEV_PLATFORM,
.dev = {
.platform_data = kirkwood_uart0_data,
},
static struct platform_device kirkwood_uart1 = {
.name = "serial8250",
- .id = 1,
+ .id = PLAT8250_DEV_PLATFORM1,
.dev = {
.platform_data = kirkwood_uart1_data,
},
.dram = &kirkwood_mbus_dram_info,
};
-static u64 kirkwood_xor_dmamask = DMA_BIT_MASK(32);
-
/*****************************************************************************
* XOR0
.resource = kirkwood_xor0_shared_resources,
};
+static u64 kirkwood_xor_dmamask = DMA_BIT_MASK(32);
+
static struct resource kirkwood_xor00_resources[] = {
[0] = {
.start = IRQ_KIRKWOOD_XOR_00,
#include <linux/serial_8250.h>
#include <linux/mbus.h>
#include <linux/mv643xx_eth.h>
+#include <linux/dma-mapping.h>
#include <asm/page.h>
#include <asm/timex.h>
#include <asm/mach/map.h>
{
.name = "ge0 base",
.start = GE0_PHYS_BASE + 0x2000,
- .end = GE0_PHYS_BASE + 0x3fff,
+ .end = GE0_PHYS_BASE + SZ_16K - 1,
.flags = IORESOURCE_MEM,
},
};
.num_resources = 1,
.resource = loki_ge0_resources,
.dev = {
- .coherent_dma_mask = 0xffffffff,
+ .coherent_dma_mask = DMA_BIT_MASK(32),
},
};
{
.name = "ge1 base",
.start = GE1_PHYS_BASE + 0x2000,
- .end = GE1_PHYS_BASE + 0x3fff,
+ .end = GE1_PHYS_BASE + SZ_16K - 1,
.flags = IORESOURCE_MEM,
},
};
.num_resources = 1,
.resource = loki_ge1_resources,
.dev = {
- .coherent_dma_mask = 0xffffffff,
+ .coherent_dma_mask = DMA_BIT_MASK(32),
},
};
.name = "mvsas",
.id = 0,
.dev = {
- .coherent_dma_mask = 0xffffffff,
+ .coherent_dma_mask = DMA_BIT_MASK(32),
},
.num_resources = ARRAY_SIZE(loki_sas_resources),
.resource = loki_sas_resources,
static struct platform_device loki_uart0 = {
.name = "serial8250",
- .id = 0,
+ .id = PLAT8250_DEV_PLATFORM,
.dev = {
.platform_data = loki_uart0_data,
},
static struct platform_device loki_uart1 = {
.name = "serial8250",
- .id = 1,
+ .id = PLAT8250_DEV_PLATFORM1,
.dev = {
.platform_data = loki_uart1_data,
},
.phy_version = EHCI_PHY_NA,
};
-static u64 ehci_dmamask = 0xffffffffUL;
+static u64 ehci_dmamask = DMA_BIT_MASK(32);
/*****************************************************************************
static struct resource mv78xx0_ehci0_resources[] = {
{
.start = USB0_PHYS_BASE,
- .end = USB0_PHYS_BASE + 0x0fff,
+ .end = USB0_PHYS_BASE + SZ_4K - 1,
.flags = IORESOURCE_MEM,
}, {
.start = IRQ_MV78XX0_USB_0,
.id = 0,
.dev = {
.dma_mask = &ehci_dmamask,
- .coherent_dma_mask = 0xffffffff,
+ .coherent_dma_mask = DMA_BIT_MASK(32),
.platform_data = &mv78xx0_ehci_data,
},
.resource = mv78xx0_ehci0_resources,
static struct resource mv78xx0_ehci1_resources[] = {
{
.start = USB1_PHYS_BASE,
- .end = USB1_PHYS_BASE + 0x0fff,
+ .end = USB1_PHYS_BASE + SZ_4K - 1,
.flags = IORESOURCE_MEM,
}, {
.start = IRQ_MV78XX0_USB_1,
.id = 1,
.dev = {
.dma_mask = &ehci_dmamask,
- .coherent_dma_mask = 0xffffffff,
+ .coherent_dma_mask = DMA_BIT_MASK(32),
.platform_data = &mv78xx0_ehci_data,
},
.resource = mv78xx0_ehci1_resources,
static struct resource mv78xx0_ehci2_resources[] = {
{
.start = USB2_PHYS_BASE,
- .end = USB2_PHYS_BASE + 0x0fff,
+ .end = USB2_PHYS_BASE + SZ_4K - 1,
.flags = IORESOURCE_MEM,
}, {
.start = IRQ_MV78XX0_USB_2,
.id = 2,
.dev = {
.dma_mask = &ehci_dmamask,
- .coherent_dma_mask = 0xffffffff,
+ .coherent_dma_mask = DMA_BIT_MASK(32),
.platform_data = &mv78xx0_ehci_data,
},
.resource = mv78xx0_ehci2_resources,
{
.name = "ge00 base",
.start = GE00_PHYS_BASE + 0x2000,
- .end = GE00_PHYS_BASE + 0x3fff,
+ .end = GE00_PHYS_BASE + SZ_16K - 1,
.flags = IORESOURCE_MEM,
}, {
.name = "ge err irq",
.num_resources = 1,
.resource = mv78xx0_ge00_resources,
.dev = {
- .coherent_dma_mask = 0xffffffff,
+ .coherent_dma_mask = DMA_BIT_MASK(32),
},
};
{
.name = "ge01 base",
.start = GE01_PHYS_BASE + 0x2000,
- .end = GE01_PHYS_BASE + 0x3fff,
+ .end = GE01_PHYS_BASE + SZ_16K - 1,
.flags = IORESOURCE_MEM,
},
};
.num_resources = 1,
.resource = mv78xx0_ge01_resources,
.dev = {
- .coherent_dma_mask = 0xffffffff,
+ .coherent_dma_mask = DMA_BIT_MASK(32),
},
};
{
.name = "ge10 base",
.start = GE10_PHYS_BASE + 0x2000,
- .end = GE10_PHYS_BASE + 0x3fff,
+ .end = GE10_PHYS_BASE + SZ_16K - 1,
.flags = IORESOURCE_MEM,
},
};
.num_resources = 1,
.resource = mv78xx0_ge10_resources,
.dev = {
- .coherent_dma_mask = 0xffffffff,
+ .coherent_dma_mask = DMA_BIT_MASK(32),
},
};
{
.name = "ge11 base",
.start = GE11_PHYS_BASE + 0x2000,
- .end = GE11_PHYS_BASE + 0x3fff,
+ .end = GE11_PHYS_BASE + SZ_16K - 1,
.flags = IORESOURCE_MEM,
},
};
.num_resources = 1,
.resource = mv78xx0_ge11_resources,
.dev = {
- .coherent_dma_mask = 0xffffffff,
+ .coherent_dma_mask = DMA_BIT_MASK(32),
},
};
.name = "sata_mv",
.id = 0,
.dev = {
- .coherent_dma_mask = 0xffffffff,
+ .coherent_dma_mask = DMA_BIT_MASK(32),
},
.num_resources = ARRAY_SIZE(mv78xx0_sata_resources),
.resource = mv78xx0_sata_resources,
static struct platform_device mv78xx0_uart0 = {
.name = "serial8250",
- .id = 0,
+ .id = PLAT8250_DEV_PLATFORM,
.dev = {
.platform_data = mv78xx0_uart0_data,
},
static struct platform_device mv78xx0_uart1 = {
.name = "serial8250",
- .id = 1,
+ .id = PLAT8250_DEV_PLATFORM1,
.dev = {
.platform_data = mv78xx0_uart1_data,
},
static struct platform_device mv78xx0_uart2 = {
.name = "serial8250",
- .id = 2,
+ .id = PLAT8250_DEV_PLATFORM2,
.dev = {
.platform_data = mv78xx0_uart2_data,
},
.phy_version = EHCI_PHY_ORION,
};
-static u64 ehci_dmamask = 0xffffffffUL;
+static u64 ehci_dmamask = DMA_BIT_MASK(32);
/*****************************************************************************
.id = 0,
.dev = {
.dma_mask = &ehci_dmamask,
- .coherent_dma_mask = 0xffffffff,
+ .coherent_dma_mask = DMA_BIT_MASK(32),
.platform_data = &orion5x_ehci_data,
},
.resource = orion5x_ehci0_resources,
.id = 1,
.dev = {
.dma_mask = &ehci_dmamask,
- .coherent_dma_mask = 0xffffffff,
+ .coherent_dma_mask = DMA_BIT_MASK(32),
.platform_data = &orion5x_ehci_data,
},
.resource = orion5x_ehci1_resources,
/*****************************************************************************
- * GigE
+ * GE00
****************************************************************************/
-struct mv643xx_eth_shared_platform_data orion5x_eth_shared_data = {
+struct mv643xx_eth_shared_platform_data orion5x_ge00_shared_data = {
.dram = &orion5x_mbus_dram_info,
};
-static struct resource orion5x_eth_shared_resources[] = {
+static struct resource orion5x_ge00_shared_resources[] = {
{
.start = ORION5X_ETH_PHYS_BASE + 0x2000,
- .end = ORION5X_ETH_PHYS_BASE + 0x3fff,
+ .end = ORION5X_ETH_PHYS_BASE + SZ_16K - 1,
.flags = IORESOURCE_MEM,
}, {
.start = IRQ_ORION5X_ETH_ERR,
},
};
-static struct platform_device orion5x_eth_shared = {
+static struct platform_device orion5x_ge00_shared = {
.name = MV643XX_ETH_SHARED_NAME,
.id = 0,
.dev = {
- .platform_data = &orion5x_eth_shared_data,
+ .platform_data = &orion5x_ge00_shared_data,
},
- .num_resources = ARRAY_SIZE(orion5x_eth_shared_resources),
- .resource = orion5x_eth_shared_resources,
+ .num_resources = ARRAY_SIZE(orion5x_ge00_shared_resources),
+ .resource = orion5x_ge00_shared_resources,
};
-static struct resource orion5x_eth_resources[] = {
+static struct resource orion5x_ge00_resources[] = {
{
.name = "eth irq",
.start = IRQ_ORION5X_ETH_SUM,
.name = MV643XX_ETH_NAME,
.id = 0,
.num_resources = 1,
- .resource = orion5x_eth_resources,
+ .resource = orion5x_ge00_resources,
.dev = {
- .coherent_dma_mask = 0xffffffff,
+ .coherent_dma_mask = DMA_BIT_MASK(32),
},
};
void __init orion5x_eth_init(struct mv643xx_eth_platform_data *eth_data)
{
- eth_data->shared = &orion5x_eth_shared;
+ eth_data->shared = &orion5x_ge00_shared;
orion5x_eth.dev.platform_data = eth_data;
- platform_device_register(&orion5x_eth_shared);
+ platform_device_register(&orion5x_ge00_shared);
platform_device_register(&orion5x_eth);
}
d->netdev = &orion5x_eth.dev;
for (i = 0; i < d->nr_chips; i++)
- d->chip[i].mii_bus = &orion5x_eth_shared.dev;
+ d->chip[i].mii_bus = &orion5x_ge00_shared.dev;
orion5x_switch_device.dev.platform_data = d;
platform_device_register(&orion5x_switch_device);
.name = "sata_mv",
.id = 0,
.dev = {
- .coherent_dma_mask = 0xffffffff,
+ .coherent_dma_mask = DMA_BIT_MASK(32),
},
.num_resources = ARRAY_SIZE(orion5x_sata_resources),
.resource = orion5x_sata_resources,
orion5x_id(&dev, &rev, &dev_name);
printk(KERN_INFO "Orion ID: %s. TCLK=%d.\n", dev_name, orion5x_tclk);
- orion5x_eth_shared_data.t_clk = orion5x_tclk;
+ orion5x_ge00_shared_data.t_clk = orion5x_tclk;
orion5x_spi_plat_data.tclk = orion5x_tclk;
orion5x_uart0_data[0].uartclk = orion5x_tclk;
orion5x_uart1_data[0].uartclk = orion5x_tclk;