ARM: vexpress: use generic CCI code to turn on CCI ports on TC2

Signed-off-by: Nicolas Pitre <nico@linaro.org>

diff --git a/arch/arm/mach-vexpress/tc2_pm_setup.S b/arch/arm/mach-vexpress/tc2_pm_setup.S
index 4728f83731a4119272491fa33642f9eb2d6b51b6..a18dafeeb0ee7345899e156f17d5f0f8697ffca1 100644 (file)
--- a/arch/arm/mach-vexpress/tc2_pm_setup.S
+++ b/arch/arm/mach-vexpress/tc2_pm_setup.S
@@ -27,22 +27,6 @@
 #define A15_BX_ADDR0           0xB68
 
 
-#define CCI_PHYS_BASE          0x2c090000
-
-#define SLAVE_SNOOPCTL_OFFSET  0
-#define SNOOPCTL_SNOOP_ENABLE  (1 << 0)
-#define SNOOPCTL_DVM_ENABLE    (1 << 1)
-
-#define CCI_STATUS_OFFSET      0xc
-#define STATUS_CHANGE_PENDING  (1 << 0)
-
-#define CCI_SLAVE_OFFSET(n)    (0x1000 + 0x1000 * (n))
-#define CCI_SLAVE_A15          3
-#define CCI_SLAVE_A7           4
-#define CCI_A15_OFFSET         CCI_SLAVE_OFFSET(CCI_SLAVE_A15)
-#define CCI_A7_OFFSET          CCI_SLAVE_OFFSET(CCI_SLAVE_A7)
-
-
 ENTRY(tc2_resume)
        mrc     p15, 0, r0, c0, c0, 5
        ubfx    r1, r0, #0, #4          @ r1 = cpu
@@ -67,25 +51,7 @@ ENTRY(tc2_pm_power_up_setup)
        cmp     r0, #0
        beq     2f
 
-       @ Enable CCI snoops
-       mrc     p15, 0, r0, c0, c0, 5   @ MPIDR
-       ubfx    r0, r0, #8, #4          @ cluster
-       ldr     r3, =CCI_PHYS_BASE + CCI_A15_OFFSET
-       cmp     r0, #0          @ A15 cluster?
-       addne   r3, r3, #CCI_A7_OFFSET - CCI_A15_OFFSET
-
-       @ r3 now points to the correct CCI slave register block
-       ldr     r0, [r3, #SLAVE_SNOOPCTL_OFFSET]
-       orr     r0, r0, #SNOOPCTL_SNOOP_ENABLE | SNOOPCTL_DVM_ENABLE
-       str     r0, [r3, #SLAVE_SNOOPCTL_OFFSET]        @ enable CCI snoops
-
-       @ Wait for snoop control change to complete:
-       ldr     r3, =CCI_PHYS_BASE
-1:     ldr     r0, [r3, #CCI_STATUS_OFFSET]
-       tst     r0, #STATUS_CHANGE_PENDING
-       bne     1b
-
-       bx      lr
+       b cci_enable_port_for_self
 
 2:     @ Clear the BX addr register
        ldr     r3, =SPC_PHYS_BASE + A15_BX_ADDR0