<&clk_gates19 1>;/*pclk_peri_axi_matrix*/
};
+ /* I2C_PMU */
i2c0: i2c@ff650000 {
compatible = "rockchip,rk30-i2c";
reg = <0x0 0xff650000 0x0 0x1000>;
status = "disabled";
};
- i2c1: i2c@ff140000 {
+ /* I2C_AUDIO */
+ i2c1: i2c@ff660000 {
compatible = "rockchip,rk30-i2c";
- reg = <0x0 0xff140000 0x0 0x1000>;
- interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
+ reg = <0x0 0xff660000 0x0 0x1000>;
+ interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default", "gpio";
pinctrl-0 = <&i2c1_xfer>;
pinctrl-1 = <&i2c1_gpio>;
gpios = <&gpio2 GPIO_C5 GPIO_ACTIVE_LOW>, <&gpio2 GPIO_C6 GPIO_ACTIVE_LOW>;
- clocks = <&clk_gates19 11>;
+ clocks = <&clk_gates12 3>;
rockchip,check-idle = <1>;
status = "disabled";
};
- i2c2: i2c@ff660000 {
+ /* I2C_SENSOR */
+ i2c2: i2c@ff140000 {
compatible = "rockchip,rk30-i2c";
- reg = <0x0 0xff660000 0x0 0x1000>;
- interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
+ reg = <0x0 0xff140000 0x0 0x1000>;
+ interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default", "gpio";
pinctrl-0 = <&i2c2_xfer>;
pinctrl-1 = <&i2c2_gpio>;
gpios = <&gpio3 GPIO_D7 GPIO_ACTIVE_LOW>, <&gpio0 GPIO_B1 GPIO_ACTIVE_LOW>;
- clocks = <&clk_gates12 3>;
+ clocks = <&clk_gates19 11>;
rockchip,check-idle = <1>;
status = "disabled";
};
+ /* I2C_CAM */
i2c3: i2c@ff150000 {
compatible = "rockchip,rk30-i2c";
reg = <0x0 0xff150000 0x0 0x1000>;
status = "disabled";
};
+ /* I2C_TP */
i2c4: i2c@ff160000 {
compatible = "rockchip,rk30-i2c";
reg = <0x0 0xff160000 0x0 0x1000>;
status = "disabled";
};
+ /* I2C_HDMI */
i2c5: i2c@ff170000 {
compatible = "rockchip,rk30-i2c";
reg = <0x0 0xff170000 0x0 0x1000>;