#define LLVM_TARGET_INSTINFO_H
#include "llvm/Target/Machine.h"
+#include "llvm/Support/DataTypes.h"
+
+class MachineInstrDescriptor;
-typedef int InstrSchedClass;
+typedef int InstrSchedClass;
// Global variable holding an array of descriptors for machine instructions.
// The actual object needs to be created separately for each target machine.
#include "llvm/Target/Data.h"
#include "llvm/Support/NonCopyable.h"
-#include "llvm/Support/DataTypes.h"
#include <string>
-#include <hash_map>
-#include <hash_set>
-#include <algorithm>
-class StructType;
-struct MachineInstrDescriptor;
class TargetMachine;
class MachineInstrInfo;
typedef int MachineOpCode;
typedef int OpCodeMask;
-static const unsigned MAX_OPCODE_SIZE = 16;
-
-//-----------------------------------------------------------------------------
-// class MachineRegClassInfo
-//
-// Purpose:
-// Interface to description of machine register class (e.g., int reg class
-// float reg class etc)
-//
-//--------------------------------------------------------------------------
-
-class IGNode;
-class MachineRegClassInfo {
-protected:
- const unsigned RegClassID; // integer ID of a reg class
- const unsigned NumOfAvailRegs; // # of avail for coloring -without SP etc.
- const unsigned NumOfAllRegs; // # of all registers -including SP,g0 etc.
-
-public:
-
- inline unsigned getRegClassID() const { return RegClassID; }
- inline unsigned getNumOfAvailRegs() const { return NumOfAvailRegs; }
- inline unsigned getNumOfAllRegs() const { return NumOfAllRegs; }
-
-
-
- // This method should find a color which is not used by neighbors
- // (i.e., a false position in IsColorUsedArr) and
- virtual void colorIGNode(IGNode * Node, bool IsColorUsedArr[] ) const = 0;
-
-
- MachineRegClassInfo(const unsigned ID, const unsigned NVR,
- const unsigned NAR): RegClassID(ID), NumOfAvailRegs(NVR),
- NumOfAllRegs(NAR)
- { } // empty constructor
-
-};
-
-
-
-
-//---------------------------------------------------------------------------
-// class MachineRegInfo
-//
-// Purpose:
-// Interface to register info of target machine
-//
-//--------------------------------------------------------------------------
-
-class LiveRangeInfo;
-class Method;
-class Instruction;
-class LiveRange;
-class AddedInstrns;
-class MachineInstr;
-typedef hash_map<const MachineInstr *, AddedInstrns *> AddedInstrMapType;
-
-// A vector of all machine register classes
-typedef vector<const MachineRegClassInfo *> MachineRegClassArrayType;
-
-
-class MachineRegInfo : public NonCopyableV {
-
-protected:
-
- MachineRegClassArrayType MachineRegClassArr;
-
-
-public:
-
-
- inline unsigned int getNumOfRegClasses() const {
- return MachineRegClassArr.size();
- }
-
- const MachineRegClassInfo *const getMachineRegClass(unsigned i) const {
- return MachineRegClassArr[i];
- }
-
-
- virtual unsigned getRegClassIDOfValue (const Value *const Val) const = 0;
-
- virtual void colorArgs(const Method *const Meth,
- LiveRangeInfo & LRI) const = 0;
-
- virtual void colorCallArgs(vector<const Instruction *> & CallInstrList,
- LiveRangeInfo& LRI,
- AddedInstrMapType& AddedInstrMap ) const = 0;
-
- virtual int getUnifiedRegNum(int RegClassID, int reg) const = 0;
-
- virtual const string getUnifiedRegName(int reg) const = 0;
-
- //virtual void printReg(const LiveRange *const LR) const =0;
-
- MachineRegInfo() { }
-
-};
-
-
-
//---------------------------------------------------------------------------
--- /dev/null
+//===-- llvm/Target/RegInfo.h - Target Register Information ------*- C++ -*-==//
+//
+// This file is used to describe the register system of a target to the register
+// allocator.
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef LLVM_TARGET_REGINFO_H
+#define LLVM_TARGET_REGINFO_H
+
+class LiveRangeInfo;
+class Method;
+class Instruction;
+class LiveRange;
+class AddedInstrns;
+class MachineInstr;
+
+//-----------------------------------------------------------------------------
+// class MachineRegClassInfo
+//
+// Purpose:
+// Interface to description of machine register class (e.g., int reg class
+// float reg class etc)
+//
+//--------------------------------------------------------------------------
+
+class IGNode;
+class MachineRegClassInfo {
+protected:
+ const unsigned RegClassID; // integer ID of a reg class
+ const unsigned NumOfAvailRegs; // # of avail for coloring -without SP etc.
+ const unsigned NumOfAllRegs; // # of all registers -including SP,g0 etc.
+
+public:
+
+ inline unsigned getRegClassID() const { return RegClassID; }
+ inline unsigned getNumOfAvailRegs() const { return NumOfAvailRegs; }
+ inline unsigned getNumOfAllRegs() const { return NumOfAllRegs; }
+
+
+
+ // This method should find a color which is not used by neighbors
+ // (i.e., a false position in IsColorUsedArr) and
+ virtual void colorIGNode(IGNode * Node, bool IsColorUsedArr[] ) const = 0;
+
+
+ MachineRegClassInfo(const unsigned ID, const unsigned NVR,
+ const unsigned NAR): RegClassID(ID), NumOfAvailRegs(NVR),
+ NumOfAllRegs(NAR) { }
+};
+
+//---------------------------------------------------------------------------
+// class MachineRegInfo
+//
+// Purpose:
+// Interface to register info of target machine
+//
+//--------------------------------------------------------------------------
+
+typedef hash_map<const MachineInstr *, AddedInstrns *> AddedInstrMapType;
+
+// A vector of all machine register classes
+typedef vector<const MachineRegClassInfo *> MachineRegClassArrayType;
+
+
+class MachineRegInfo : public NonCopyableV {
+protected:
+ MachineRegClassArrayType MachineRegClassArr;
+
+public:
+ inline unsigned int getNumOfRegClasses() const {
+ return MachineRegClassArr.size();
+ }
+
+ const MachineRegClassInfo *const getMachineRegClass(unsigned i) const {
+ return MachineRegClassArr[i];
+ }
+
+
+ virtual unsigned getRegClassIDOfValue (const Value *const Val) const = 0;
+
+ virtual void colorArgs(const Method *const Meth,
+ LiveRangeInfo & LRI) const = 0;
+
+ virtual void colorCallArgs(vector<const Instruction *> & CallInstrList,
+ LiveRangeInfo& LRI,
+ AddedInstrMapType& AddedInstrMap ) const = 0;
+
+ virtual int getUnifiedRegNum(int RegClassID, int reg) const = 0;
+
+ virtual const string getUnifiedRegName(int reg) const = 0;
+
+ //virtual void printReg(const LiveRange *const LR) const =0;
+
+ MachineRegInfo() { }
+
+};
+
+#endif
#define LLVM_TARGET_SCHEDINFO_H
#include "llvm/Target/InstInfo.h"
+#include <hash_map>
typedef long long cycles_t;
const cycles_t HUGE_LATENCY = ~((unsigned long long) 1 << sizeof(cycles_t)-1);
const cycles_t INVALID_LATENCY = -HUGE_LATENCY;
-
+static const unsigned MAX_OPCODE_SIZE = 16;
class OpCodePair {
public: