/* inform CIU */
ret = mci_send_cmd(slot,
SDMMC_CMD_UPD_CLK | SDMMC_CMD_PRV_DAT_WAIT, 0);
- if(ret < 0)
+ if(ret < 0)
return -EAGAIN;
if (!(host->mmc->restrict_caps & RESTRICT_CARD_TYPE_EMMC))
goto normal;
- if(clock == 400*1000){
+ if(clock <= 400*1000){
MMC_DBG_BOOT_FUNC(host->mmc,
- "dw_mci_setup_bus: argue clk_mmc workaround out 800K for init[%s]",
- mmc_hostname(host->mmc));
+ "dw_mci_setup_bus: argue clk_mmc workaround out %dHz for init[%s]",
+ clock * 2, mmc_hostname(host->mmc));
/* RK3288 clk_mmc will change parents to 24MHz xtal*/
- clk_set_rate(host->clk_mmc,800*1000);
+ clk_set_rate(host->clk_mmc, clock * 2);
div = 0;
host->set_div = div;
struct dw_mci_tuning_data tuning_data;
int err = -ENOSYS;
- if (!(mmc->restrict_caps & RESTRICT_CARD_TYPE_EMMC))
- return 0;
-
if (opcode == MMC_SEND_TUNING_BLOCK_HS200) {
if (mmc->ios.bus_width == MMC_BUS_WIDTH_8) {
tuning_data.blk_pattern = tuning_blk_pattern_8bit;
return -EINVAL;
}
- /////////////////////////////////////////////////
- //temporary settings,!!!!!!!!!!!!!!!
+
+ /* Recommend sample phase and delayline
+ Fixme: Mix-use these three controllers will cause
+ con_id mismatch.
+ */
if (mmc->restrict_caps & RESTRICT_CARD_TYPE_EMMC)
tuning_data.con_id = 3;
- else if (mmc->restrict_caps & RESTRICT_CARD_TYPE_SDIO)
+ else if(mmc->restrict_caps & RESTRICT_CARD_TYPE_SDIO)
tuning_data.con_id = 1;
else
- tuning_data.con_id = 0;
- tuning_data.tuning_type = 1; //0--drv, 1--sample
- /////////////////////////////////////////////////
+ tuning_data.con_id = 0;
+ /* 0: driver, from host->devices
+ 1: sample, from devices->host
+ */
+ tuning_data.tuning_type = 1;
+
if (drv_data && drv_data->execute_tuning)
err = drv_data->execute_tuning(slot, opcode, &tuning_data);
+
return err;
}