Handle ISD::DECLARE with PIC relocation model.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62516 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/PowerPC/PPCISelDAGToDAG.cpp b/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
index 276abe77bf3b6d4929156e90228f65a5466ed9eb..c43acdb5c2e3f3102492b5de197e234bf1b63a28 100644 (file)
--- a/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
+++ b/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
@@ -1107,10 +1107,21 @@ SDNode *PPCDAGToDAGISel::Select(SDValue Op) {
     FrameIndexSDNode *FINode = dyn_cast<FrameIndexSDNode>(N1);
     if (!FINode)
       break;
-    if (N2.getOpcode() == ISD::ADD &&
-        N2.getOperand(0).getOpcode() == PPCISD::Hi &&
-        N2.getOperand(1).getOpcode() == PPCISD::Lo)
-      N2 = N2.getOperand(0).getOperand(0);
+    if (N2.getOpcode() == ISD::ADD) {
+      if (N2.getOperand(0).getOpcode() == ISD::ADD &&
+          N2.getOperand(0).getOperand(0).getOpcode() == PPCISD::GlobalBaseReg &&
+          N2.getOperand(0).getOperand(1).getOpcode() == PPCISD::Hi &&
+          N2.getOperand(1).getOpcode() == PPCISD::Lo)
+        N2 = N2.getOperand(0).getOperand(1).getOperand(0);
+      else if (N2.getOperand(0).getOpcode() == ISD::ADD &&
+               N2.getOperand(0).getOperand(0).getOpcode() == PPCISD::GlobalBaseReg &&
+               N2.getOperand(0).getOperand(1).getOpcode() == PPCISD::Lo &&
+               N2.getOperand(1).getOpcode() == PPCISD::Hi)
+        N2 = N2.getOperand(0).getOperand(1).getOperand(0);
+      else if (N2.getOperand(0).getOpcode() == PPCISD::Hi &&
+               N2.getOperand(1).getOpcode() == PPCISD::Lo)
+        N2 = N2.getOperand(0).getOperand(0);
+    }
     if (!isa<GlobalAddressSDNode>(N2))
       break;
     int FI = cast<FrameIndexSDNode>(N1)->getIndex();