Finish moving uncond br over to .td file, remove from .cpp file.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24590 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/PowerPC/PPCISelDAGToDAG.cpp b/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
index 252de5ee51c64a548103a8e25472e85b29cf4fbe..9ed7de498093712cbeb6275caf77e20241771b4f 100644 (file)
--- a/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
+++ b/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
@@ -873,6 +873,7 @@ SDOperand PPCDAGToDAGISel::Select(SDOperand Op) {
   
   switch (N->getOpcode()) {
   default: break;
+  case ISD::BasicBlock:         return CodeGenMap[Op] = Op;
   case ISD::DYNAMIC_STACKALLOC: return SelectDYNAMIC_STACKALLOC(Op);
   case ISD::ADD_PARTS:          return SelectADD_PARTS(Op);
   case ISD::SUB_PARTS:          return SelectSUB_PARTS(Op);
@@ -1219,9 +1220,6 @@ SDOperand PPCDAGToDAGISel::Select(SDOperand Op) {
     // Finally, select this to a blr (return) instruction.
     return CurDAG->SelectNodeTo(N, PPC::BLR, MVT::Other, Chain);
   }
-  case ISD::BR:
-    return CurDAG->SelectNodeTo(N, PPC::B, MVT::Other, N->getOperand(1),
-                                Select(N->getOperand(0)));
   case ISD::BR_CC:
   case ISD::BRTWOWAY_CC: {
     SDOperand Chain = Select(N->getOperand(0));

diff --git a/lib/Target/PowerPC/PPCInstrInfo.td b/lib/Target/PowerPC/PPCInstrInfo.td
index 48ac98176b421cd76b440de589ce76599ff7dcff..ad8f91e06bab2699068c4302feb7a6623f4ac2fd 100644 (file)
--- a/lib/Target/PowerPC/PPCInstrInfo.td
+++ b/lib/Target/PowerPC/PPCInstrInfo.td
@@ -190,7 +190,7 @@ let isTerminator = 1 in {
 let Defs = [LR] in
   def MovePCtoLR : Pseudo<(ops piclabel:$label), "bl $label", []>;
 
-let isBranch = 1, isTerminator = 1 in {
+let isBranch = 1, isTerminator = 1, hasCtrlDep = 1 in {
   def COND_BRANCH : Pseudo<(ops CRRC:$crS, u16imm:$opc,
                                 target:$true, target:$false),
                            "; COND_BRANCH", []>;