ARM: OMAP4+: Add prm and cm base init function.
authorR Sricharan <r.sricharan@ti.com>
Tue, 8 May 2012 05:55:22 +0000 (23:55 -0600)
committerPaul Walmsley <paul@pwsan.com>
Tue, 8 May 2012 05:55:22 +0000 (23:55 -0600)
Instead of statically defining seperate arrays for every OMAP4+ archs,
have a generic init function to populate the arrays. This avoids the
need for creating new array for every arch added in the future that
reuses the prm and cm registers read/write code.

Cc: Paul Walmsley <paul@pwsan.com>
Signed-off-by: R Sricharan <r.sricharan@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
arch/arm/mach-omap2/cminst44xx.c
arch/arm/mach-omap2/common.c
arch/arm/mach-omap2/common.h
arch/arm/mach-omap2/prcm-common.h
arch/arm/mach-omap2/prcm.c
arch/arm/mach-omap2/prminst44xx.c

index bd8810c3753f2436b1268eddfaf788149147fbbf..8c86d294b1a326b6ea8bbf07239cb92983ba5f50 100644 (file)
@@ -32,6 +32,7 @@
 #include "prcm44xx.h"
 #include "prm44xx.h"
 #include "prcm_mpu44xx.h"
+#include "prcm-common.h"
 
 /*
  * CLKCTRL_IDLEST_*: possible values for the CM_*_CLKCTRL.IDLEST bitfield:
 #define CLKCTRL_IDLEST_INTERFACE_IDLE          0x2
 #define CLKCTRL_IDLEST_DISABLED                        0x3
 
-static u32 _cm_bases[OMAP4_MAX_PRCM_PARTITIONS] = {
-       [OMAP4430_INVALID_PRCM_PARTITION]       = 0,
-       [OMAP4430_PRM_PARTITION]                = OMAP4430_PRM_BASE,
-       [OMAP4430_CM1_PARTITION]                = OMAP4430_CM1_BASE,
-       [OMAP4430_CM2_PARTITION]                = OMAP4430_CM2_BASE,
-       [OMAP4430_SCRM_PARTITION]               = 0,
-       [OMAP4430_PRCM_MPU_PARTITION]           = OMAP4430_PRCM_MPU_BASE,
-};
+static void __iomem *_cm_bases[OMAP4_MAX_PRCM_PARTITIONS];
+
+/**
+ * omap_cm_base_init - Populates the cm partitions
+ *
+ * Populates the base addresses of the _cm_bases
+ * array used for read/write of cm module registers.
+ */
+void omap_cm_base_init(void)
+{
+       _cm_bases[OMAP4430_PRM_PARTITION] = prm_base;
+       _cm_bases[OMAP4430_CM1_PARTITION] = cm_base;
+       _cm_bases[OMAP4430_CM2_PARTITION] = cm2_base;
+       _cm_bases[OMAP4430_PRCM_MPU_PARTITION] = prcm_mpu_base;
+}
 
 /* Private functions */
 
@@ -106,7 +114,7 @@ u32 omap4_cminst_read_inst_reg(u8 part, s16 inst, u16 idx)
        BUG_ON(part >= OMAP4_MAX_PRCM_PARTITIONS ||
               part == OMAP4430_INVALID_PRCM_PARTITION ||
               !_cm_bases[part]);
-       return __raw_readl(OMAP2_L4_IO_ADDRESS(_cm_bases[part] + inst + idx));
+       return __raw_readl(_cm_bases[part] + inst + idx);
 }
 
 /* Write into a register in a CM instance */
@@ -115,7 +123,7 @@ void omap4_cminst_write_inst_reg(u32 val, u8 part, s16 inst, u16 idx)
        BUG_ON(part >= OMAP4_MAX_PRCM_PARTITIONS ||
               part == OMAP4430_INVALID_PRCM_PARTITION ||
               !_cm_bases[part]);
-       __raw_writel(val, OMAP2_L4_IO_ADDRESS(_cm_bases[part] + inst + idx));
+       __raw_writel(val, _cm_bases[part] + inst + idx);
 }
 
 /* Read-modify-write a register in CM1. Caller must lock */
index 1549c11000d32687190c7f86e742f018a8eba95f..8a6953a34fe2b01d159ba40a296a343818236a76 100644 (file)
@@ -166,6 +166,7 @@ static struct omap_globals omap4_globals = {
        .prm    = OMAP2_L4_IO_ADDRESS(OMAP4430_PRM_BASE),
        .cm     = OMAP2_L4_IO_ADDRESS(OMAP4430_CM_BASE),
        .cm2    = OMAP2_L4_IO_ADDRESS(OMAP4430_CM2_BASE),
+       .prcm_mpu       = OMAP2_L4_IO_ADDRESS(OMAP4430_PRCM_MPU_BASE),
 };
 
 void __init omap2_set_globals_443x(void)
index 57da7f406e28c9cca72cbfb397db288704a019de..0672fc54b30f1f4a3e05aa77260eb193d91e7fbf 100644 (file)
@@ -111,6 +111,7 @@ struct omap_globals {
        void __iomem    *prm;            /* Power and Reset Management */
        void __iomem    *cm;             /* Clock Management */
        void __iomem    *cm2;
+       void __iomem    *prcm_mpu;
 };
 
 void omap2_set_globals_242x(void);
index 29955d55064f6a50805fba93183cefb7479a5f0c..6da3ba483ad118ea0b0e8082fa9e5e3417635465 100644 (file)
 extern void __iomem *prm_base;
 extern void __iomem *cm_base;
 extern void __iomem *cm2_base;
+extern void __iomem *prcm_mpu_base;
+
+#if defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_ARCH_OMAP5)
+extern void omap_prm_base_init(void);
+extern void omap_cm_base_init(void);
+#else
+static inline void omap_prm_base_init(void)
+{
+}
+static inline void omap_cm_base_init(void)
+{
+}
+#endif
 
 /**
  * struct omap_prcm_irq - describes a PRCM interrupt bit
index 626acfad719001714136704cba55fe99150128cf..480f40a5ee4295ae6f8d587a51616d02557df75e 100644 (file)
@@ -42,6 +42,7 @@
 void __iomem *prm_base;
 void __iomem *cm_base;
 void __iomem *cm2_base;
+void __iomem *prcm_mpu_base;
 
 #define MAX_MODULE_ENABLE_WAIT         100000
 
@@ -155,4 +156,11 @@ void __init omap2_set_globals_prcm(struct omap_globals *omap2_globals)
                cm_base = omap2_globals->cm;
        if (omap2_globals->cm2)
                cm2_base = omap2_globals->cm2;
+       if (omap2_globals->prcm_mpu)
+               prcm_mpu_base = omap2_globals->prcm_mpu;
+
+       if (cpu_is_omap44xx()) {
+               omap_prm_base_init();
+               omap_cm_base_init();
+       }
 }
index 9b3898a3ac9b5a5a1e6787fe1f663ebc12efaac9..c12320c0ae952e46d05a40d50d6d260994ff98d7 100644 (file)
 
 #include "iomap.h"
 #include "common.h"
+#include "prcm-common.h"
 #include "prm44xx.h"
 #include "prminst44xx.h"
 #include "prm-regbits-44xx.h"
 #include "prcm44xx.h"
 #include "prcm_mpu44xx.h"
 
-static u32 _prm_bases[OMAP4_MAX_PRCM_PARTITIONS] = {
-       [OMAP4430_INVALID_PRCM_PARTITION]       = 0,
-       [OMAP4430_PRM_PARTITION]                = OMAP4430_PRM_BASE,
-       [OMAP4430_CM1_PARTITION]                = 0,
-       [OMAP4430_CM2_PARTITION]                = 0,
-       [OMAP4430_SCRM_PARTITION]               = 0,
-       [OMAP4430_PRCM_MPU_PARTITION]           = OMAP4430_PRCM_MPU_BASE,
-};
+static void __iomem *_prm_bases[OMAP4_MAX_PRCM_PARTITIONS];
+
+/**
+ * omap_prm_base_init - Populates the prm partitions
+ *
+ * Populates the base addresses of the _prm_bases
+ * array used for read/write of prm module registers.
+ */
+void omap_prm_base_init(void)
+{
+       _prm_bases[OMAP4430_PRM_PARTITION] = prm_base;
+       _prm_bases[OMAP4430_PRCM_MPU_PARTITION] = prcm_mpu_base;
+}
 
 /* Read a register in a PRM instance */
 u32 omap4_prminst_read_inst_reg(u8 part, s16 inst, u16 idx)
@@ -39,8 +45,7 @@ u32 omap4_prminst_read_inst_reg(u8 part, s16 inst, u16 idx)
        BUG_ON(part >= OMAP4_MAX_PRCM_PARTITIONS ||
               part == OMAP4430_INVALID_PRCM_PARTITION ||
               !_prm_bases[part]);
-       return __raw_readl(OMAP2_L4_IO_ADDRESS(_prm_bases[part] + inst +
-                                              idx));
+       return __raw_readl(_prm_bases[part] + inst + idx);
 }
 
 /* Write into a register in a PRM instance */
@@ -49,7 +54,7 @@ void omap4_prminst_write_inst_reg(u32 val, u8 part, s16 inst, u16 idx)
        BUG_ON(part >= OMAP4_MAX_PRCM_PARTITIONS ||
               part == OMAP4430_INVALID_PRCM_PARTITION ||
               !_prm_bases[part]);
-       __raw_writel(val, OMAP2_L4_IO_ADDRESS(_prm_bases[part] + inst + idx));
+       __raw_writel(val, _prm_bases[part] + inst + idx);
 }
 
 /* Read-modify-write a register in PRM. Caller must lock */