* Fn args passed in registers are now recorded as used by the call instruction

`-> asm printer updated to not print out those registers with the call instr

All of Shootout tests now work.  Great thanks to Nate Begeman for the patch!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15015 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/PowerPC/PPC32AsmPrinter.cpp b/lib/Target/PowerPC/PPC32AsmPrinter.cpp
index 184922157df5d85b4bec9b7170a36d228cbce09d..4e2b90e4b75cfef17d384e7004cc83d7c9e23037 100644 (file)
--- a/lib/Target/PowerPC/PPC32AsmPrinter.cpp
+++ b/lib/Target/PowerPC/PPC32AsmPrinter.cpp
@@ -492,14 +492,29 @@ void Printer::printMachineInstruction(const MachineInstr *MI) {
          "Instruction requires 64 bit support");
   ++EmittedInsts;
 
+  // CALLpcrel and CALLindirect are handled specially here to print only the
+  // appropriate number of args that the assembler expects.  This is because
+  // may have many arguments appended to record the uses of registers that are
+  // holding arguments to the called function.
   if (Opcode == PPC32::IMPLICIT_DEF) {
     O << "; IMPLICIT DEF ";
     printOp(MI->getOperand(0));
     O << "\n";
     return;
-  }
-  // FIXME: should probably be converted to cout.width and cout.fill
-  if (Opcode == PPC32::MovePCtoLR) {
+  } else if (Opcode == PPC32::CALLpcrel) {
+    O << TII.getName(MI->getOpcode()) << " ";
+    printOp(MI->getOperand(0));
+    O << "\n";
+    return;
+  } else if (Opcode == PPC32::CALLindirect) {
+    O << TII.getName(MI->getOpcode()) << " ";
+    printOp(MI->getOperand(0));
+    O << ", ";
+    printOp(MI->getOperand(1));
+    O << "\n";
+    return;
+  } else if (Opcode == PPC32::MovePCtoLR) {
+    // FIXME: should probably be converted to cout.width and cout.fill
     O << "bl \"L0000" << labelNumber << "$pb\"\n";
     O << "\"L0000" << labelNumber << "$pb\":\n";
     O << "\tmflr ";
@@ -509,9 +524,6 @@ void Printer::printMachineInstruction(const MachineInstr *MI) {
   }
 
   O << TII.getName(MI->getOpcode()) << " ";
-  DEBUG(std::cerr << TII.getName(MI->getOpcode()) << " expects " 
-                  << ArgCount << " args\n");
-
   if (Opcode == PPC32::LOADLoAddr) {
     printOp(MI->getOperand(0));
     O << ", lo16(";

diff --git a/lib/Target/PowerPC/PPCAsmPrinter.cpp b/lib/Target/PowerPC/PPCAsmPrinter.cpp
index 184922157df5d85b4bec9b7170a36d228cbce09d..4e2b90e4b75cfef17d384e7004cc83d7c9e23037 100644 (file)
--- a/lib/Target/PowerPC/PPCAsmPrinter.cpp
+++ b/lib/Target/PowerPC/PPCAsmPrinter.cpp
@@ -492,14 +492,29 @@ void Printer::printMachineInstruction(const MachineInstr *MI) {
          "Instruction requires 64 bit support");
   ++EmittedInsts;
 
+  // CALLpcrel and CALLindirect are handled specially here to print only the
+  // appropriate number of args that the assembler expects.  This is because
+  // may have many arguments appended to record the uses of registers that are
+  // holding arguments to the called function.
   if (Opcode == PPC32::IMPLICIT_DEF) {
     O << "; IMPLICIT DEF ";
     printOp(MI->getOperand(0));
     O << "\n";
     return;
-  }
-  // FIXME: should probably be converted to cout.width and cout.fill
-  if (Opcode == PPC32::MovePCtoLR) {
+  } else if (Opcode == PPC32::CALLpcrel) {
+    O << TII.getName(MI->getOpcode()) << " ";
+    printOp(MI->getOperand(0));
+    O << "\n";
+    return;
+  } else if (Opcode == PPC32::CALLindirect) {
+    O << TII.getName(MI->getOpcode()) << " ";
+    printOp(MI->getOperand(0));
+    O << ", ";
+    printOp(MI->getOperand(1));
+    O << "\n";
+    return;
+  } else if (Opcode == PPC32::MovePCtoLR) {
+    // FIXME: should probably be converted to cout.width and cout.fill
     O << "bl \"L0000" << labelNumber << "$pb\"\n";
     O << "\"L0000" << labelNumber << "$pb\":\n";
     O << "\tmflr ";
@@ -509,9 +524,6 @@ void Printer::printMachineInstruction(const MachineInstr *MI) {
   }
 
   O << TII.getName(MI->getOpcode()) << " ";
-  DEBUG(std::cerr << TII.getName(MI->getOpcode()) << " expects " 
-                  << ArgCount << " args\n");
-
   if (Opcode == PPC32::LOADLoAddr) {
     printOp(MI->getOperand(0));
     O << ", lo16(";

diff --git a/lib/Target/PowerPC/PowerPCAsmPrinter.cpp b/lib/Target/PowerPC/PowerPCAsmPrinter.cpp
index 184922157df5d85b4bec9b7170a36d228cbce09d..4e2b90e4b75cfef17d384e7004cc83d7c9e23037 100644 (file)
--- a/lib/Target/PowerPC/PowerPCAsmPrinter.cpp
+++ b/lib/Target/PowerPC/PowerPCAsmPrinter.cpp
@@ -492,14 +492,29 @@ void Printer::printMachineInstruction(const MachineInstr *MI) {
          "Instruction requires 64 bit support");
   ++EmittedInsts;
 
+  // CALLpcrel and CALLindirect are handled specially here to print only the
+  // appropriate number of args that the assembler expects.  This is because
+  // may have many arguments appended to record the uses of registers that are
+  // holding arguments to the called function.
   if (Opcode == PPC32::IMPLICIT_DEF) {
     O << "; IMPLICIT DEF ";
     printOp(MI->getOperand(0));
     O << "\n";
     return;
-  }
-  // FIXME: should probably be converted to cout.width and cout.fill
-  if (Opcode == PPC32::MovePCtoLR) {
+  } else if (Opcode == PPC32::CALLpcrel) {
+    O << TII.getName(MI->getOpcode()) << " ";
+    printOp(MI->getOperand(0));
+    O << "\n";
+    return;
+  } else if (Opcode == PPC32::CALLindirect) {
+    O << TII.getName(MI->getOpcode()) << " ";
+    printOp(MI->getOperand(0));
+    O << ", ";
+    printOp(MI->getOperand(1));
+    O << "\n";
+    return;
+  } else if (Opcode == PPC32::MovePCtoLR) {
+    // FIXME: should probably be converted to cout.width and cout.fill
     O << "bl \"L0000" << labelNumber << "$pb\"\n";
     O << "\"L0000" << labelNumber << "$pb\":\n";
     O << "\tmflr ";
@@ -509,9 +524,6 @@ void Printer::printMachineInstruction(const MachineInstr *MI) {
   }
 
   O << TII.getName(MI->getOpcode()) << " ";
-  DEBUG(std::cerr << TII.getName(MI->getOpcode()) << " expects " 
-                  << ArgCount << " args\n");
-
   if (Opcode == PPC32::LOADLoAddr) {
     printOp(MI->getOperand(0));
     O << ", lo16(";