// ADR instruction labels.
def t2adrlabel : Operand<i32> {
let EncoderMethod = "getT2AdrLabelOpValue";
- let PrintMethod = "printT2AdrLabelOperand";
}
llvm_unreachable("Unknown LDR label operand?");
}
-void ARMInstPrinter::printT2AdrLabelOperand(const MCInst *MI, unsigned OpNum,
- raw_ostream &O) {
- const MCOperand &MO1 = MI->getOperand(OpNum);
- if (MO1.isExpr())
- O << *MO1.getExpr();
- else if (MO1.isImm())
- O << "[pc, #" << MO1.getImm() << "]";
- else
- llvm_unreachable("Unknown LDR label operand?");
-}
-
-
// so_reg is a 4-operand unit corresponding to register forms of the A5.1
// "Addressing Mode 1 - Data-processing operands" forms. This includes:
// REG 0 0 - e.g. R5
void printPCLabel(const MCInst *MI, unsigned OpNum, raw_ostream &O);
void printT2LdrLabelOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O);
- void printT2AdrLabelOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O);
};
} // end namespace llvm
@ LDRSH(literal)
@------------------------------------------------------------------------------
ldrsh r5, _bar
- ldrsh.w r4, #1435
@ CHECK: ldrsh.w r5, _bar @ encoding: [0xbf'A',0xf9'A',A,0x50'A']
@ CHECK: @ fixup A - offset: 0, value: _bar, kind: fixup_t2_ldst_pcrel_12
-@ CHECK: ldrsh.w r4, #1435 @ encoding: [0x3f,0xf9,0x9b,0x45]
+
+@ TEMPORARILY DISABLED:
+@ ldrsh.w r4, [pc, #1435]
+@ : ldrsh.w r4, [pc, #1435] @ encoding: [0x3f,0xf9,0x9b,0x45]
@------------------------------------------------------------------------------
@ LDRSHT