arm64: dts: rockchip: rk3366: export MIPI DPHY PLL clock

Change-Id: I99a4c252f877ff36a16f991ee2e94bb110401e47
Signed-off-by: WeiYong Bi <bivvy.bi@rock-chips.com>

diff --git a/arch/arm64/boot/dts/rockchip/rk3366.dtsi b/arch/arm64/boot/dts/rockchip/rk3366.dtsi
index 67ce4befdb6b4cb0257d1b7e88064d973a9c2c8d..47388e8cdb13ce0130aaf8c5547e627bd9bab438 100644 (file)
--- a/arch/arm64/boot/dts/rockchip/rk3366.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3366.dtsi
@@ -1007,8 +1007,8 @@
                compatible = "rockchip,rk3366-mipi-dsi";
                reg = <0x0 0xff960000 0x0 0x4000>;
                interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
-               clocks = <&cru PCLK_MIPI_DSI0>;
-               clock-names = "pclk";
+               clocks = <&cru PCLK_MIPI_DSI0>, <&mipi_dphy>;
+               clock-names = "pclk", "hs_clk";
                resets = <&cru SRST_MIPIDSI0>;
                reset-names = "apb";
                phys = <&mipi_dphy>;
@@ -1041,6 +1041,8 @@
                reg = <0x0 0xff968000 0x0 0x4000>;
                clocks = <&cru SCLK_MIPIDSI_24M>, <&cru PCLK_DPHYTX>;
                clock-names = "ref", "pclk";
+               clock-output-names = "mipi_dphy_pll";
+               #clock-cells = <0>;
                resets = <&cru SRST_MIPIDPHYTX>;
                reset-names = "apb";
                #phy-cells = <0>;