[PATCH] ppc32: fix for misreported SDRAM size on Radstone PPC7D platform
authorChris Elston <chris.elston@radstone.co.uk>
Sun, 1 May 2005 15:58:40 +0000 (08:58 -0700)
committerLinus Torvalds <torvalds@ppc970.osdl.org>
Sun, 1 May 2005 15:58:40 +0000 (08:58 -0700)
This patch fixes the SDRAM output from /proc/cpuinfo.  The previous code
assumed that there was only one bank of SDRAM, and that the size in the memory
configuration register was the total size.

Signed-off-by: Chris Elston <chris.elston@radstone.co.uk>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
arch/ppc/platforms/radstone_ppc7d.c
arch/ppc/platforms/radstone_ppc7d.h

index 2a99b43737a88772d8e88c8095fe0e49e070d773..df2ea051380a67dd6d1425808fb8e78e4527627c 100644 (file)
@@ -253,6 +253,8 @@ static int ppc7d_show_cpuinfo(struct seq_file *m)
        u8 val1, val2;
        static int flash_sizes[4] = { 64, 32, 0, 16 };
        static int flash_banks[4] = { 4, 3, 2, 1 };
+       static int sdram_bank_sizes[4] = { 128, 256, 512, 1 };
+       int sdram_num_banks = 2;
        static char *pci_modes[] = { "PCI33", "PCI66",
                "Unknown", "Unknown",
                "PCIX33", "PCIX66",
@@ -279,13 +281,17 @@ static int ppc7d_show_cpuinfo(struct seq_file *m)
                   (val1 == PPC7D_CPLD_MB_TYPE_PLL_100) ? 100 :
                   (val1 == PPC7D_CPLD_MB_TYPE_PLL_64) ? 64 : 0);
 
+       val = inb(PPC7D_CPLD_MEM_CONFIG);
+       if (val & PPC7D_CPLD_SDRAM_BANK_NUM_MASK) sdram_num_banks--;
+
        val = inb(PPC7D_CPLD_MEM_CONFIG_EXTEND);
-       val1 = val & PPC7D_CPLD_SDRAM_BANK_SIZE_MASK;
-       seq_printf(m, "SDRAM\t\t: %d%c",
-                  (val1 == PPC7D_CPLD_SDRAM_BANK_SIZE_128M) ? 128 :
-                  (val1 == PPC7D_CPLD_SDRAM_BANK_SIZE_256M) ? 256 :
-                  (val1 == PPC7D_CPLD_SDRAM_BANK_SIZE_512M) ? 512 : 1,
-                  (val1 == PPC7D_CPLD_SDRAM_BANK_SIZE_1G) ? 'G' : 'M');
+       val1 = (val & PPC7D_CPLD_SDRAM_BANK_SIZE_MASK) >> 6;
+       seq_printf(m, "SDRAM\t\t: %d banks of %d%c, total %d%c",
+                  sdram_num_banks,
+                  sdram_bank_sizes[val1],
+                  (sdram_bank_sizes[val1] < 128) ? 'G' : 'M',
+                  sdram_num_banks * sdram_bank_sizes[val1],
+                  (sdram_bank_sizes[val1] < 128) ? 'G' : 'M');
        if (val2 & PPC7D_CPLD_MB_TYPE_ECC_FITTED_MASK) {
                seq_printf(m, " [ECC %sabled]",
                           (val2 & PPC7D_CPLD_MB_TYPE_ECC_ENABLE_MASK) ? "en" :
index 4546fff2b0c33250699c238d82600fc96e8be80f..938375510be48bdf4ea13bcfce9bfd0aa170459c 100644 (file)
 #define PPC7D_CPLD_FLASH_CNTL                  0x086E
 
 /* MEMORY_CONFIG_EXTEND */
+#define PPC7D_CPLD_SDRAM_BANK_NUM_MASK         0x02
 #define PPC7D_CPLD_SDRAM_BANK_SIZE_MASK                0xc0
 #define PPC7D_CPLD_SDRAM_BANK_SIZE_128M                0
 #define PPC7D_CPLD_SDRAM_BANK_SIZE_256M                0x40